1. Operating Systems

2. Shared Pages

3. Segmentation
CPU

4. Example

5. Sharing of Segments

6. Protection
Associate valid/invalid bit with each segment table entry to indicate if the referenced segment is part of the process address space or not
Read, write, and execute bits to define legal operations on a segment

7. Paged Segmentation
Divide every segment in a process into fixed size pages
Need for a page table per segment
CPU’s memory management unit must support both segmentation and paging

8. Paged Segmentation 1 2 3 4 5
logical memory
physical memory

9. Paged Segmentation logical memory physical memory page table 1 1 2 3 31 2 3 . 10 1 1 2 3 3 4 1
126 3 10 5
page table 2
logical memory
physical memory

10. Paged Segmentation
Logical address is still <s,d>, with s used to index the segment table
Each segment table entry consist of the tuple <segment-length, page-table-base>
The logical address is legal if d < segment-length

11. Paged Segmentation
Segment offset, d, is partitioned into two parts: p and d’, where p is used to index the page table associated with segment, s, and d’ is used as offset within a page

12. offset within the page p
Paged Segmentation
p indexes the page table to retrieve frame, f, and physical address (f,d’) is formed s d
index segment table p d’
index page table
offset within the page p

13. Paged Segmentation

14. MULTICS Example s is 18 bits and d is 16 bits GE 345 processor
Logical address = 34 bits
Page size = 1 KB
s is 18 bits and d is 16 bits
Size of p and d’, largest segment size, and max. number of segments per process?

15. MULTICS Example Largest segment = 2d bytes = 216 bytes
Maximum number of pages per segment = 216 / 1 K = 64
|p| = log2 64 bits = 6 bits
|d’| = log2 1 K = 10 bits
Maximum number of segments per process = 2s = 218

16. MULTICS Example s d
18 bits p d’
6 bits
10 bits

17. MULTICS Example
Consider a process with its segment 15 having 5096 bytes. The process generates a logical address (15,3921).
Is it a legal address?
How many pages does the segment have?
What page does the logical address refer to?

18. MULTICS Example Is it a legal address? Yes
How many pages does the segment have?
ceiling[5096/1024]= 5
What page does the logical address refers to?
ceiling[3921/1024]= 4
(i.e., page number 3)

19. MULTICS Example
What are the value of d’ and the physical address if page number 3 (i.e., the fourth page) is in frame 12?
d’ = 3921 – 3*1K = 849
Physical address = 12*1K = 13137

20. MULTICS Example 15 3921 3 849 s d p d’ page table for segment 15 12 11 2 3 4 12
page table for
segment 15

21. MULTICS Example
3921 12
13137

22. Intel 80386 Example IBM OS/2, Microsoft Windows, and Linux
Paged segmentation with two-level paging
Logical address = 48 bits
16-bit selector and 32-bit offset
Page size = 4 KB

23. Intel 80386 Example 4-byte page table entry
32-entry TLB, covering 32*4K (128 KB) memory … TLB Reach

24. Intel 80386 Example 16-bit Selector 32-bit Offset s g p
13-bit Segment # s g p
2-bit field for specifying the privilege level
1-bit field to specify GDT or LDT

25. Intel 80386 Example Real Mode
20-bit physical address is obtained by shifting left the Selector value by four bits and adding to it the 16-bit effective address