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Adders Module M8.1 Section 6.2. Adders Half Adder Full Adder TTL Adder.

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Presentation on theme: "Adders Module M8.1 Section 6.2. Adders Half Adder Full Adder TTL Adder."— Presentation transcript:

1 Adders Module M8.1 Section 6.2

2 Adders Half Adder Full Adder TTL Adder

3 Half Adder CABS 0001 A 0 B 0 S 0 C 1 0 0 0 1 1 0 1 0 1 1 0 1 Dec Binary 1 1 +1 2 10

4 Multiple-bit Addition 0 1 0 1 1 1 A B A 3 A 2 A 1 A 0 0 1 A 0 1 1 1 B 3 B 2 B 1 B 0 B 0 1 0 1 1 1 1 A i +B i +C i SiSi C i+1

5 Full Adder 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 C i A i B i S i C i+1 11 11 CiCi AiBiAiBi 00011110 0 1 SiSi

6 Full Adder 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 C i A i B i S i C i+1 S i = !C i & !A i & B i # !C i & A i & !B i # C i & !A i & !B i # C i & A i & B i

7 Full Adder S i = !C i & !A i & B i # !C i & A i & !B i # C i & !A i & !B i # C i & A i & B i S i = !C i & (!A i & B i # A i & !B i ) # C i & (!A i & !B i # A i & B i ) S i = !C i & (A i $ B i ) # C i & !(A i $ B i ) S i = C i $ (A i $ B i )

8 Full Adder 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 C i A i B i S i C i+1 1 111 CiCi AiBiAiBi 00011110 0 1 C i+1

9 Full Adder 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 C i A i B i S i C i+1 CiCi AiBiAiBi 00011110 0 1 1 111 C i+1 C i+1 = A i & B i # C i & B i # C i & A i

10 Full Adder 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 C i A i B i S i C i+1 CiCi AiBiAiBi 00011110 0 1 1 111 C i+1 C i+1 = A i & B i # C i & !A i & B i # C i & A i & !B i

11 Full Adder C i+1 = A i & B i # C i !A i & B i # C i & A i & !B i C i+1 = A i & B i # C i & (!A i & B i # A i & !B i ) C i+1 = A i & B i # C i & (A i $ B i ) Recall: S i = C i $ (A i $ B i ) C i+1 = A i & B i # C i & (A i $ B i )

12 Full Adder S i = C i $ (A i $ B i ) Half-adder C i+1 = A i & B i # C i & (A i $ B i )

13 Full Adder A full adder can be made from two half adders (plus an OR gate).

14 Full Adder Block Diagram

15 4-Bit Adder C 1 1 1 0 A 0 1 0 1 B 0 1 1 1 S 1 1 0 0

16 adder.abl MODULE adder TITLE 'Adder, R. Haskell, 10/6/02' DECLARATIONS " INPUT PINS " A3..A0 PIN 6, 7, 11, 5; " Switch 1..4 A = [A3..A0]; " 4-bit operand B3..B0 PIN 72, 71, 66, 70; " Switch 5..8 B = [B3..B0]; " 4-bit addend " OUTPUT PINS " S3..S0 PIN 39, 37, 36, 35 ISTYPE 'com'; " LED 5..8 S = [S3..S0]; " 4-bit sum CF PIN 40 ISTYPE 'com'; " LED 4; carry flag OVF PIN 44 ISTYPE 'com'; " LED 1; overflow flag

17 adder.abl (cont’d) " INTERMEDIATE NODES " C4..C0 NODE ISTYPE 'com'; " internal carry vector Cin = [C3..C0]; " carry input vector Cout = [C4..C1]; " carry output vector Intermediate Carry bits

18 adder.abl (cont’d) S i = C i $ (A i $ B i ) C i+1 = A i & B i # C i & (A i $ B i ) EQUATIONS C0 = 0; " zero carry in S = A $ B $ Cin; " sum output Cout = A & B # (A $ B) & Cin; " carry output vector CF = C4; " carry flag OVF = C4 $ C3; " overflow flag END adder4

19 TTL Adder 1 2 3 4 5 6 7 89 10 11 12 13 14 15 16 GND Vcc B3 S1 B1 C4 S4 B4 C0 A3 S3 A4 A2 B2 S2 A1 74LS283

20 Question Add the following 4-bit binary numbers 10110110 01101111 What is the answer in hex? Was there a net carry?


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