1. 8051 Assembly Language ECE 611 Microprocessor Systems
Dr. Roger L. Haggard, Associate Professor
Department of Electrical and Computer Engineering
Tennessee Technological University
Spring 1998
RLH - Spring 1998

2. Outline 8051 Programmer’s Model Addressing Modes
Data Movement Instructions
Arithmetic Instructions
Logical Instructions
Shift Instructions
Bit Manipulation
Program Control Instructions
RLH - Spring 1998

3. 8051 Introduction 8 bit Data bus, 16 bit Address bus
Many Special Function Registers (SFRs) for control and I/O
RLH - Fall 1997RLH - Spring 1998

4. 8051 Code Example ORG 440h Dat DB 0FFh ; in Program Memory Wait EQU 35
Myword DW h ;in Program Memory
ORG 0
Start: MOV A,#2Ch ; Acc C
INC R ; R R2+1
SETB P ; Port 0 Bit
ADD A,Wait ; A Acc + M(35)
DEC @R ; M(R0) M(R0) - 1
LJUMP Finished ; PC Finished
Finished :
General Format
Label: Opcode dest,src ; Comments
RLH - Fall 1997RLH - Spring 1998

5. 8051 Programmer’s Model (1) Program Memory Data Memory 60 K7 7
FFFF
FFFF
60 K
External
64 K
External
All instructions
Constant Data
(Using MOVC)
1000 OR
0FFF
4 K
Internal
0000
0000
if EA = HI
if EA = LO
Data Memory
FFFF
AND FF
SFRs
(Using MOVX) 80
64 K
External 7F @R
RAM 00
@DPTR
Internal
0000
Direct
Direct , Register,
Reg. Indirect
RLH - Fall 1997RLH - Spring 1998

6. 8051 Programmer’s Model (2) SFRs SFRs Scratch Pad Area RAMFF A8
* IE
Interrupt Enable Ctr 1
Scratch Pad Area F0
* B A0
* P2
Port 2 99
SBUF
Serial Data Buffer E0
* ACC
RAM 98
* SCON
Serial Control D0
* PSW 90
* P1
Port 1 8D
* TH1
timer 1 High B8
* IP 8C
* TH0
timer 0 High 30 8B
* TL1
timer 1 Low
Bit # F OR 8A
* TL0
timer 0 Low B0
* P3
Bit Addressable RAM 89
TMOD
timer/counter Mode
F.7 88
* TCEN
timer/counter control 20 R7 87
PCON
Power Control
Bank 3 18 R0
Select Bank
with
PSW.4 , .3 =
RS1, RS0 R7 83
DPH
Bank 2
Data pointer DPTR 10 R0 82
DPL 81 SP
Stack pointer
Bank 1 R7 08 R0 80
* P0
Port 0
Bank 0 R7 00 R0
* = Bit Addressable
RLH - Fall 1997RLH - Spring 1998

7. 8051 Addressing Modes (1) Immediate - # Label or Number
MOV R6,# ; R
MOV A,#0CAh ; Acc CA 16
MOV DPTR,#loc ; DPTR value of symbol “loc”
Direct - Label or Number
MOV PSW,R ; M(PSW) R5
MOV A,045h ; Acc M(45 10)
Register - Rn
MOV R1,A ; R Acc
MOV B,R ; B R3
RLH - Fall 1997RLH - Spring 1998

8. 8051 Addressing Modes (2) Register Indirect - @R0, @R1, @DPTR
MOV @R0,# ; M(R0)
MOV ; A M(R1)
MOVX @DPTR,A ; External data M(DPTR) A
Register Indirect
MOVC ; A ROM(A+DPTR)
MOVC ; A ROM(A+PC)
JMP @A+DPTR ; PC (A+DPTR)
Bit - bit number or label.bit or bit label
MOV C,IE ; cy bit 0 of IE reg (EX0)
MOV C,EX ; same
SETB 07Fh ; Bit 7F
SETB 2F ; same
RLH - Fall 1997RLH - Spring 1998

9. 8051 Instructions Instruction Classes Data Movement Arithmetic Logical
Shift
Bit Manipulation
Program Control
RLH - Fall 1997RLH - Spring 1998

10. 8051 Data Movement - 1 MOVE MOV A, # A Immediate
D A Direct R A Register
@R A Register Indirect
MOV R, # Rn D A
MOV D, # Direct D R @R A
MOV @R, # Register Indirect D A
RLH - Fall 1997RLH - Spring 1998

11. 8051 Data Movement - 2 Move From Program Memory
MOVC Acc Rom(A+DPTR)
Acc Rom(A+PC)
Move External Data RAM
MOVX
MOVX @R, A
@DPTR, A
Others
PUSH D SP SP+1, m(SP) D
POP D D m(SP), SP SP - 1
XCH A, R SWAP Acc Rn D @R
RLH - Fall 1997RLH - Spring 1998

12. 8051 Arithmetic - 1 Add/Subtract ADD A, # Acc A+Immediate D R @R
ADDC A, # Acc A+Immediate+Carry D R @R
SUBB A, # Acc Acc-Immediate-Carry D R @R
RLH - Fall 1997RLH - Spring 1998

13. 8051 Arithmetic - 2 Inc/Dec INC A Acc Acc+1 D R @R DEC A Acc Acc-1 D R
Mul/Div
MUL AB B:A Acc * B (unsigned)
DIV AB A Quo ( A/B ) (unsigned) B Rem( A/B )
RLH - Fall 1997RLH - Spring 1998

14. 8051 Logical AND,OR,XOR AND A, # ORL D XRL R @R D, A D, # Other
CLR A Acc 0
CPL A Acc Acc
SWAP A Acc(7-4) Acc(3-0)
RLH - Fall 1997RLH - Spring 1998

15. 8051 Shift Rotates RL A RLC A RR A RRC A 7 Acc 7 C Acc 7 Acc 7 Acc C
Acc 7 C
Acc 7
Acc 7
Acc C
RLH - Fall 1997RLH - Spring 1998

16. 8051 Bit Manipulation - 1 Clear/Set/Complement CLR C Carry 0
bit bit SETB C
bit
CPL C
And, Or, Move
ANL C, bit Carry Carry AND bit
C, /bit Carry Carry AND bit ORL C, bit
C, /bit
MOV C, bit
bit, C
RLH - Fall 1997RLH - Spring 1998

17. 8051 Bit Manipulation - 2 Jump JC label Jump if Carry set
JNC label Jump if Carry clear JB bit, label Jump if bit set JNB bit, label Jump if bit clear JBC bit, label Jump if bit set, then clear bit
label = PC relative (+ 127)
RLH - Fall 1997RLH - Spring 1998

18. 8051 Program Control - 1 Jump AJMP label-A Absolute Jump- 11 bits(2K)
LJMP label-L Long Jump - 16 bits (64K) SJMP label Short Jump
JMP @A+DPTR Jump Indirect PC (A+DPTR) JZ label Jump if zero
JNZ label Jump if not zero
Compare and Jump
CJNE A, #, label Compare 1st op to 2nd op and
A, D, label jump to label if not Equal
R, #, label
@R,#, label
RLH - Fall 1997RLH - Spring 1998

19. 8051 Program Control - 2 Decrement and Jump
DJNZ R, label Rn = Rn-1 , Jump if not zero
D, label
Subroutines
ACALL label-A Absolute Call - 11 bits (2K)
LCALL label-L Long Call - 16 bits (64K)
RET Return from Subroutine
RETI Return from ISR
PC m(SP), SP SP-2
RLH - Fall 1997RLH - Spring 1998