1. Logic Design Lab3 老師 : 伍紹勳 助教 : 江長庭 鄭仲傑

2. Equipment IC ： –7408(AND) x 1 –7432(OR) x 1 –7486(XOR) x 1 –LED x 3

3. Half Adder (HA) Half Adder x y Carry (C) Sum (S) x y C S 0 0 0 1 1 0 0 1 1 1 1 0 Sum of Products :S = x’y + x y’= x  y C = x y x y S y x x y C x + y C S

4. Why do we need Full Adder (FA) ? 1-bit addition ex: 1+1=10 Using HA is OK! 2-bits addition 1 + 1 1 0 1 HA is not enough!!! 1 We need a input Carry-in

5. Full Adder S C n+1 x CnCn y x y C n C n+1 S 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 S = x y’C n ’ + x’y’C n + x yC n + x’yC n ’ = x  y  C n C n+1 = x y + xC n + yC n = x y + C n (x  y ) x y + C n C n+1 S

6. Full Adder (FA) C n+1 x y CnCn s So many logic gates!!!

7. HA + HA = FA Half Adder x y CnCn x y S C Half Adder Sx y S C x y S CnCn C n+1 Less logic gates!!! x  y x y C n (x  y ) C n+1 = x y + C n (x  y )

8. Requirement Choose HA + HA = FA Requirement 1: 1-bit addition HA or FA (one input is zero) Requirement 2: 2-bits addition HA + FA or FA + FA Waste!!! Not recommend 1 1 1 +1 1 1 1 0 HA FA

9. 2-bits addition ( HA + FA ) x2 y2 S2 CnCn C n+1 (S3) x y S1 y x x1 y1 C x2 x1 + y2 y1 S3 S2 S1

10. Debug method 1.Check 有無接 VCC 跟 GND 2.Check half adder 的值是否與真值表相同 3.Check full adder 的值是否與真值表相同 4.Check HA 與 FA 之間的連線是否正確