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1 - ECpE 583 (Reconfigurable Computing): XPS / MP3 Overview + Midterm Overview Iowa State University (Ames) CPRE 583 Reconfigurable Computing Lecture 15: Wed 10/14/2011 (XPS/MP3 Overview + Midterm Overview) Instructor: Dr. Phillip Jones (phjones@iastate.edu) Reconfigurable Computing Laboratory Iowa State University Ames, Iowa, USA http://class.ece.iastate.edu/cpre583/
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2 - ECpE 583 (Reconfigurable Computing): XPS / MP3 Overview + Midterm Overview Iowa State University (Ames) Project Teams: Let me know if you do not have a team! MP2 due Friday 10/14 Project Proposal due Friday 10/14 (midnight) –High-level topic, and high plan for execution –I’ll give feedback –Project proposal Class presentation on Wed 10/19 5-10 power point slides MP3 assigned this eveing Announcements/Reminders
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3 - ECpE 583 (Reconfigurable Computing): XPS / MP3 Overview + Midterm Overview Iowa State University (Ames) Project Grading Breakdown 50% Final Project Demo 30% Final Project Report –20% of your project report grade will come from your 5-6 project updates. Friday’s midnight 20% Final Project Presentation
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4 - ECpE 583 (Reconfigurable Computing): XPS / MP3 Overview + Midterm Overview Iowa State University (Ames) FPL FPT FCCM FPGA DAC ICCAD Reconfig RTSS RTAS ISCA Projects Ideas: Relevant conferences Micro Super Computing HPCA IPDPS
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5 - ECpE 583 (Reconfigurable Computing): XPS / MP3 Overview + Midterm Overview Iowa State University (Ames) Teams Formed and Topic: Mon 10/10 –Project idea in Power Point 3-5 slides Motivation (why is this interesting, useful) What will be the end result High-level picture of final product –Project team list: Name, Responsibility High-level Plan/Proposal: Fri 10/14 –Power Point 5-10 slides (presentation to class Wed 10/19) System block diagrams High-level algorithms (if any) Concerns –Implementation –Conceptual Related research papers (if any) Projects: Target Timeline
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6 - ECpE 583 (Reconfigurable Computing): XPS / MP3 Overview + Midterm Overview Iowa State University (Ames) Work on projects: 10/19 - 12/9 –Weekly update reports More information on updates will be given Presentations: Finals week –Present / Demo what is done at this point –15-20 minutes (depends on number of projects) Final write up and Software/Hardware turned in: Day of final (TBD) Projects: Target Timeline
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7 - ECpE 583 (Reconfigurable Computing): XPS / MP3 Overview + Midterm Overview Iowa State University (Ames) Initial Project Proposal Slides (5-10 slides) Project team list: Name, Responsibility (who is project leader) –Team size: 3-4 (5 case-by-case) Project idea Motivation (why is this interesting, useful) What will be the end result High-level picture of final product High-level Plan –Break project into mile stones Provide initial schedule: I would initially schedule aggressively to have project complete by Thanksgiving. Issues will pop up to cause the schedule to slip. –System block diagrams –High-level algorithms (if any) –Concerns Implementation Conceptual Research papers related to you project idea
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8 - ECpE 583 (Reconfigurable Computing): XPS / MP3 Overview + Midterm Overview Iowa State University (Ames) Weekly Project Updates The current state of your project write up –Even in the early stages of the project you should be able to write a rough draft of the Introduction and Motivation section The current state of your Final Presentation –Your Initial Project proposal presentation (Due Wed 10/19). Should make for a starting point for you Final presentation What things are work & not working What roadblocks are you running into
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9 - ECpE 583 (Reconfigurable Computing): XPS / MP3 Overview + Midterm Overview Iowa State University (Ames) Common Questions
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10 - ECpE 583 (Reconfigurable Computing): XPS / MP3 Overview + Midterm Overview Iowa State University (Ames) Common Questions
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11 - ECpE 583 (Reconfigurable Computing): XPS / MP3 Overview + Midterm Overview Iowa State University (Ames) 6-input Luts MidTerm (Q1.a)
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12 - ECpE 583 (Reconfigurable Computing): XPS / MP3 Overview + Midterm Overview Iowa State University (Ames) i) What would be 2 disadvantages of using 3-LUTs instead of 6-LUTs in part a)? (2pts) ii) If you had to manufacture an FPGA device to support applications that used MANY 2-to-1 multiplexers, would you make the FPGA primitives 6-LUTs or 3-LUTs. What would be 2 advantages of using your choice compared to the alternative? (2 pts) iii) In general discuss some of the trade-offs between having an FPGA made up of 4-LUTs vs 20-LUTs (3 pts) MidTerm (Q1.b)
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13 - ECpE 583 (Reconfigurable Computing): XPS / MP3 Overview + Midterm Overview Iowa State University (Ames) ) Discuss the reasons why an application implemented using an FPGA will typically be lower performing than an application implemented as an application specific integrated circuit (ASIC) (5 pts) ii) What are some of the reasons why a person (or company) may choose to use an FPGA instead of an ASIC to implement an application? (4pts) MidTerm (Q1.c)
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14 - ECpE 583 (Reconfigurable Computing): XPS / MP3 Overview + Midterm Overview Iowa State University (Ames) LUT configurability: How many different ways can a 6-LUT be configured? Explain how you arrived at your number. (Note it my help to use a figure for your explanation) (5pts) MidTerm (Q1.d)
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15 - ECpE 583 (Reconfigurable Computing): XPS / MP3 Overview + Midterm Overview Iowa State University (Ames) MidTerm (Q2.a)
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16 - ECpE 583 (Reconfigurable Computing): XPS / MP3 Overview + Midterm Overview Iowa State University (Ames) MidTerm (Q2.b)
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17 - ECpE 583 (Reconfigurable Computing): XPS / MP3 Overview + Midterm Overview Iowa State University (Ames) process(clk) if(clk’event and clk =1) then C <= B; end if; end process process(X, B, C, D, E) if(X = ‘0’) then A <= B or C; else case D is when ‘00’ => A<= E and B; when ‘01’ => A<= E xor B; when ‘10’ => A<= ‘1’; when ‘11’ => A<= ‘0’; end case; end if; end process MidTerm (Q2.c)
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18 - ECpE 583 (Reconfigurable Computing): XPS / MP3 Overview + Midterm Overview Iowa State University (Ames) process(sel, a, b) begin if(sel = ‘1’ and b=’1’) then z <= ‘1’; elsif(sel = ‘0’ and b = ‘1’ and a = ‘0’) then z <= c; end if; end process; process(sel_1) begin z <= ‘1’; if(sel_1 = ‘0’) then z <= ‘1’; else z <= ‘0’; end if; end process; MidTerm (Q2.d)
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19 - ECpE 583 (Reconfigurable Computing): XPS / MP3 Overview + Midterm Overview Iowa State University (Ames) MidTerm (Q3.a)
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20 - ECpE 583 (Reconfigurable Computing): XPS / MP3 Overview + Midterm Overview Iowa State University (Ames) Why is Reconfiguration management important? MidTerm (Q3.b)
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21 - ECpE 583 (Reconfigurable Computing): XPS / MP3 Overview + Midterm Overview Iowa State University (Ames) a) Write a line of VHDL that converts a lower case ASCII letter to an upper case letter (Note: you do not need to use exact numbers) (5 pts) b) What did the “TX_busy_n” signal of the UART interface indicate? Explain how you made use of this signal in your MP 1 (5 pts) c) What did the “RX_full” signal of the UART interface indicate? Explain how you made use of this signal in your MP 1 (5 pts) MidTerm (Q4)
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22 - ECpE 583 (Reconfigurable Computing): XPS / MP3 Overview + Midterm Overview Iowa State University (Ames) Tool for combining HW with SW. XPS
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23 - ECpE 583 (Reconfigurable Computing): XPS / MP3 Overview + Midterm Overview Iowa State University (Ames) MP3 FPGA PC Display.c Ethernet (UDP/IP) Power PC User Defined Instruction Monitor VGA
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24 - ECpE 583 (Reconfigurable Computing): XPS / MP3 Overview + Midterm Overview Iowa State University (Ames) MP3 FPGA PC Display.c Ethernet (UDP/IP) Power PC User Defined Instruction Monitor VGA
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25 - ECpE 583 (Reconfigurable Computing): XPS / MP3 Overview + Midterm Overview Iowa State University (Ames) MP3 FPGA PC Display.c Ethernet (UDP/IP) Power PC User Defined Instruction Monitor VGA
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