Fabián E. Bustamante, Spring 2007

Fabián E. Bustamante, Spring 2007
Virtual Memory Today Motivations for VM Address translation Accelerating translation with TLBs Dynamic memory allocation – mechanisms & policies Memory bugs Fabián E. Bustamante, Spring 2007 1

EECS 213 Introduction to Computer Systems Northwestern University
A system with physical memory only Addresses generated by the CPU correspond directly to bytes in physical memory Memory 0: Physical Addresses 1: CPU E.g. most Cray machines, early PCs, nearly all embedded systems, etc. N-1: 2 EECS 213 Introduction to Computer Systems Northwestern University 2

A system with virtual memory Modern processors use virtual addresses Hardware converts virtual addresses to physical addresses via OS-managed lookup table (page table)‏ Memory 0: Page Table 1: Virtual Addresses Physical Addresses 0: 1: CPU E.g. workstations, servers, modern PCs, etc. P-1: N-1: Disk 3 EECS 213 Introduction to Computer Systems Northwestern University 3

Motivations for virtual memory Use physical DRAM as a cache for the disk Address space of a process can exceed physical memory size Sum of address spaces of multiple processes can exceed physical memory Simplify memory management Multiple processes resident in main memory. Each process with its own address space Only “active” code and data is actually in memory Allocate more memory to process as needed. Provide protection One process can’t interfere with another. because they operate in different address spaces. User process cannot access privileged information different sections of address spaces have different permissions. 4 EECS 213 Introduction to Computer Systems Northwestern University 4

Motivation #1: DRAM a “cache” for disk Full address space is quite large: 32-bit addresses: ~4,000,000,000 (4 billion) bytes 64-bit addresses: ~16,000,000,000,000,000,000 (16 quintillion) bytes Disk storage is ~300X cheaper than DRAM storage 80 GB of DRAM: ~ $33,000 80 GB of disk: ~ $110 To access large amounts of data in a cost-effective manner, the bulk of the data must be stored on disk 1GB: ~$200 80 GB: ~$110 4 MB: ~$500 Disk DRAM SRAM 5 EECS 213 Introduction to Computer Systems Northwestern University 5

Levels in memory hierarchy cache virtual memory CPU regs C a c h e Memory disk 8 B 32 B 4 KB Register Cache Memory Disk Memory size: speed: $/Mbyte: line size: 32 B 1 ns 8 B 32KB-4MB 2 ns $125/MB 32 B 1024 MB 30 ns $0.20/MB 4 KB 100 GB 8 ms $0.001/MB larger, slower, cheaper 6 EECS 213 Introduction to Computer Systems Northwestern University 6

DRAM vs. SRAM as a “cache” DRAM vs. disk is more extreme than SRAM vs. DRAM Access latencies: DRAM ~10X slower than SRAM Disk ~100,000X slower than DRAM Importance of exploiting spatial locality: First byte is ~100,000X slower than successive bytes on disk vs. ~4X improvement for page-mode vs. regular accesses to DRAM Bottom line: Design decisions made for DRAM caches driven by enormous cost of misses 7 EECS 213 Introduction to Computer Systems Northwestern University 7

Impact of properties on design If DRAM was to be organized similar to an SRAM cache, how would we set the following design parameters? Line size? Large, since disk better at transferring large blocks Associativity? High, to minimize miss rate Write through or write back? Write back, since can’t afford to perform small writes to disk What would the impact of these choices be on: Miss rate: Extremely low. << 1% Hit time: Must match cache/DRAM performance Miss latency: Very high. ~20ms Tag storage overhead: Low, relative to block size 8 EECS 213 Introduction to Computer Systems Northwestern University 8

Locating an object in a “Cache” SRAM Cache Tag stored with cache line Maps from cache block to memory blocks From cached to uncached form Save a few bits by only storing tag No tag for block not in cache Hardware retrieves information Can quickly match against multiple tags “Cache” Tag Data 0: D 243 X Object Name = X? 1: X 17 • • N-1: J 105 9 EECS 213 Introduction to Computer Systems Northwestern University 9

Locating an object in “Cache” (cont.)‏ DRAM Cache Each allocated page of virtual memory has entry in page table Mapping from virtual pages to physical pages From uncached form to cached form Page table entry even if page not in memory Specifies disk address Only way to indicate where to find page OS retrieves information Page Table “Cache” Location Data X Object Name D: J: X: 0: 1: N-1: 243 On Disk 17 • • 1 105 10 EECS 213 Introduction to Computer Systems Northwestern University 10

Page faults (like “cache misses”)‏ What if an object is on disk rather than in memory? Page table entry indicates virtual address not in memory OS exception handler invoked to move data from disk into memory current process suspends, others can resume OS has full control over placement, etc. Before fault After fault Memory Memory Page Table Page Table Virtual Addresses Physical Addresses Virtual Addresses Physical Addresses CPU CPU Disk Disk 11 EECS 213 Introduction to Computer Systems Northwestern University 11

Servicing a page fault Processor signals controller Read block of length P starting at disk address X and store starting at memory address Y Read occurs Direct Memory Access (DMA)‏ Under control of I/O controller I / O controller signals completion Interrupt processor OS resumes suspended process (1) Initiate Block Read Processor Reg (3) Read Done Cache Memory-I/O bus (2) DMA Transfer I/O controller Memory disk Disk Disk disk 12 EECS 213 Introduction to Computer Systems Northwestern University 12

Motivation #2: Memory management
Multiple processes can reside in physical memory. How do we resolve address conflicts? what if two processes access something at the same address? memory invisible to user code kernel virtual memory %esp stack Memory mapped region forshared libraries Linux/x86 process memory image the “brk” ptr runtime heap (via malloc)‏ uninitialized data (.bss)‏ initialized data (.data)‏ program text (.text)‏ forbidden 13 EECS 213 Introduction to Computer Systems Northwestern University 13

Solution: Separate virtual addr. spaces Virtual and physical address spaces divided into equal-sized blocks blocks are called “pages” (both virtual and physical)‏ Each process has its own virtual address space operating system controls how virtual pages as assigned to physical memory Physical Address Space (DRAM)‏ Virtual Address Space for Process 1: Address Translation VP 1 PP 2 VP 2 ... N-1 (e.g., read/only library code)‏ PP 7 Virtual Address Space for Process 2: VP 1 VP 2 PP 10 ... M-1 N-1 14 EECS 213 Introduction to Computer Systems Northwestern University 14

Motivation #3: Protection Page table entry contains access rights information hardware enforces this protection (trap into OS if violation occurs)‏ Page Tables Memory Read? Write? Physical Addr 0: VP 0: VP 1: VP 2: Yes No PP 9 1: Process i: Yes Yes PP 4 No No XXXXXXX • • • Read? Write? Physical Addr VP 0: VP 1: VP 2: Yes Yes PP 6 Process j: Yes No PP 9 N-1: No No XXXXXXX • • • 15 EECS 213 Introduction to Computer Systems Northwestern University 15

VM address translation Virtual Address Space V = {0, 1, …, N–1} Physical Address Space P = {0, 1, …, M–1} M < N Address Translation MAP: V  P U {} For virtual address a: MAP(a) = a’ if data at virtual address a is at physical address a’ in P MAP(a) =  if data at virtual address a is not in physical memory Either invalid or stored on disk 16 EECS 213 Introduction to Computer Systems Northwestern University 16

VM address translation: Miss Processor Hardware Addr Trans Mechanism Main Memory a a' virtual address part of the on-chip memory mgmt unit (MMU)‏ physical address 17 EECS 213 Introduction to Computer Systems Northwestern University 17

VM address translation: Miss page fault fault handler Processor Hardware Addr Trans Mechanism  Main Memory Secondary memory a a' OS performs this transfer (only if miss)‏ virtual address part of the on-chip memory mgmt unit (MMU)‏ physical address 18 EECS 213 Introduction to Computer Systems Northwestern University 18

VM address translation Parameters P = 2p = page size (bytes). N = 2n = Virtual address limit M = 2m = Physical address limit n–1 p p–1 virtual page number page offset virtual address address translation m–1 p p–1 physical page number page offset physical address Page offset bits don’t change as a result of translation 19 EECS 213 Introduction to Computer Systems Northwestern University 19

Page tables Virtual Page Number Memory resident page table (physical page or disk address)‏ Physical Memory Valid 1 1 1 1 1 1 Disk Storage (swap file or regular file system file)‏ 1 20 EECS 213 Introduction to Computer Systems Northwestern University 20

Address translation via page table
virtual page number (VPN)‏ page offset virtual address physical page number (PPN)‏ physical address p–1 p m–1 n–1 page table base register if valid=0 then page not in memory valid access VPN acts as table index 21 EECS 213 Introduction to Computer Systems Northwestern University 21

Page table operation Translation Separate (set of) page table(s) per process VPN forms index into page table (points to a page table entry)‏ 22 EECS 213 Introduction to Computer Systems Northwestern University 22

Page table operation Computing physical address Page Table Entry (PTE) provides info about page if (valid bit = 1) then the page is in memory. Use physical page number (PPN) to construct address if (valid bit = 0) then the page is on disk - page fault 23 EECS 213 Introduction to Computer Systems Northwestern University 23

Page table operation Checking protection Access rights field indicate allowable access e.g., read-only, read-write, execute-only typically support multiple protection modes Protection violation fault if user doesn’t have necessary permission 24 EECS 213 Introduction to Computer Systems Northwestern University 24

Multi-level page tables Level 2 Tables Given: 4KB (212) page size 32-bit address space 4-byte PTE Problem: Would need a 4 MB page table! 220 *4 bytes Common solution multi-level page tables e.g., 2-level table (P6)‏ Level 1 table: 1024 entries, each of which points to a Level 2 page table. Level 2 table: entries, each of which points to a page Level 1 Table ... 25 EECS 213 Introduction to Computer Systems Northwestern University 25

Integrating VM and cache Most caches “Physically Addressed” Accessed by physical addresses Allows multiple processes to have blocks in cache at a time Allows multiple processes to share pages Cache doesn’t need to be concerned with protection issues Access rights checked as part of address translation Perform address translation before cache lookup But this could involve a memory access itself (of the PTE)‏ Of course, page table entries can also become cached CPU Trans- lation Cache Main Memory VA PA miss hit data 26 EECS 213 Introduction to Computer Systems Northwestern University 26

Speeding up translation with a TLB “Translation Lookaside Buffer” (TLB)‏ Small hardware cache in MMU Maps virtual page numbers to physical page numbers Contains complete page table entries for small number of pages CPU TLB Lookup Cache Main Memory VA PA miss hit data Trans- lation 27 EECS 213 Introduction to Computer Systems Northwestern University 27

Address translation with a TLB n–1 p p–1 virtual page number page offset virtual address valid tag physical page number TLB . . . = TLB hit physical address tag byte offset index valid tag data Cache = cache hit data 28 EECS 213 Introduction to Computer Systems Northwestern University 28

Taken stock – main themes Programmer’s view Large “flat” address space Can allocate large blocks of contiguous addresses Processor “owns” machine Has private address space Unaffected by behavior of other processes System view Virtual address space created by mapping to set of pages Need not be contiguous Allocated dynamically Enforce protection during address translation OS manages many processes simultaneously Continually switching among processes Especially when one must wait for resource E.g., disk I/O to handle page fault 29 EECS 213 Introduction to Computer Systems Northwestern University 29

Simple memory system Memory is byte addressable
Access are to 1-byte words 14-bit virtual addresses, 12-bit physical address Page size = 64 bytes (26)‏ 13 12 11 10 9 8 7 6 5 4 3 2 1 VPN VPO (Virtual Page Number)‏ (Virtual Page Offset)‏ 11 10 9 8 7 6 5 4 3 2 1 PPN PPO (Physical Page Number)‏ (Physical Page Offset)‏ 30 EECS 213 Introduction to Computer Systems Northwestern University 30

Simple memory system page table Only show first 16 entries VPN PPN Vali d 00 28 1 08 13 01 – 09 17 02 33 0A 03 0B 04 0C 05 16 0D 2D 06 0E 11 07 0F 31 EECS 213 Introduction to Computer Systems Northwestern University 31

Simple memory system TLB TLB 16 entries 4-way associative 13 12 11 10 9 8 7 6 5 4 3 2 1 VPO VPN TLBI TLBT Set Tag PPN Valid 03 – 09 0D 1 00 07 02 2D 04 0A 2 08 06 3 34 32 EECS 213 Introduction to Computer Systems Northwestern University 32

Simple memory system cache Cache 16 lines 4-byte line size Direct mapped 11 10 9 8 7 6 5 4 3 2 1 PPO PPN CO CI CT Idx Tag Valid B0 B1 B2 B3 19 1 99 11 23 8 24 3A 00 51 89 15 – 9 2D 2 1B 02 04 08 A 93 DA 3B 3 36 B 0B 4 32 43 6D 8F 09 C 12 5 0D 72 F0 1D D 16 96 34 6 31 E 13 83 77 D3 7 C2 DF 03 F 14 33 EECS 213 Introduction to Computer Systems Northwestern University 33

Address translation problem 10.12 Virtual address 0x03a9 VPN ___ TLBI ___ TLBTag ____ TLB Hit? __ Page Fault? __ PPN: ____ Physical address Offset ___ CI___ CT ____ Hit? __ Byte returned: ____ 13 12 11 10 9 8 7 6 5 4 3 2 1 VPO VPN TLBI TLBT 11 10 9 8 7 6 5 4 3 2 1 PPO PPN CO CI CT 34 EECS 213 Introduction to Computer Systems Northwestern University 34

Address translation problem 10.13 Virtual address 0x0040 VPN ___ TLBI ___ TLBTag ____ TLB Hit? __ Page Fault? __ PPN: ____ Physical address Offset ___ CI___ CT ____ Hit? __ Byte returned: ____ 13 12 11 10 9 8 7 6 5 4 3 2 1 VPO VPN TLBI TLBT 11 10 9 8 7 6 5 4 3 2 1 PPO PPN CO CI CT 35 EECS 213 Introduction to Computer Systems Northwestern University 35

Harsh reality Memory matters Memory is not unbounded
It must be allocated and managed Many applications are memory dominated Especially those based on complex, graph algorithms Memory referencing bugs especially pernicious Effects are distant in both time and space Memory performance is not uniform Cache and virtual memory effects can greatly affect program performance Adapting program to characteristics of memory system can lead to major speed improvements

Dynamic Memory Allocator
Dynamic memory allocation Explicit vs. implicit memory allocator Explicit: application allocates and frees space E.g., malloc and free in C Implicit: application allocates, but does not free space E.g. garbage collection in Java, ML or Lisp Allocation In both cases the memory allocator provides an abstraction of memory as a set of blocks Doles out free memory blocks to application Will discuss simple explicit memory allocation today Application Dynamic Memory Allocator Heap Memory

Process memory image Allocators request additional heap memory
kernel virtual memory memory invisible to user code stack %esp Memory mapped region for shared libraries Allocators request additional heap memory from the operating system using the sbrk function. the “brk” ptr run-time heap (via malloc)‏ uninitialized data (.bss)‏ initialized data (.data)‏ program text (.text)‏

Malloc package #include <stdlib.h> void *malloc(size_t size)‏
If successful: Returns a pointer to a memory block of at least size bytes, (typically) aligned to 8-byte boundary. If size == 0, returns NULL If unsuccessful: returns NULL (0) and sets errno. void *realloc(void *p, size_t size) Changes size of block p and returns pointer to new block. Contents of new block unchanged up to min of old and new size. void free(void *p)‏ Returns the block pointed at by p to pool of available memory p must come from a previous call to malloc or realloc.

Malloc example void foo(int n, int m) { int i, *p;
/* allocate a block of n ints */ if ((p = (int *) malloc(n * sizeof(int))) == NULL) { perror("malloc"); exit(0); } for (i=0; i<n; i++)‏ p[i] = i; /* add m bytes to end of p block */ if ((p = (int *) realloc(p, (n+m) * sizeof(int))) == NULL) { perror("realloc"); for (i=n; i < n+m; i++)‏ /* print new array */ for (i=0; i<n+m; i++)‏ printf("%d\n", p[i]); free(p); /* return p to available memory pool */

Allocation examples p1 = malloc(4)‏ p2 = malloc(5)‏ p3 = malloc(6)‏
free(p2)‏ p4 = malloc(2)‏

Constraints Applications: Allocators
Can issue arbitrary sequence of allocation and free requests Free requests must correspond to an allocated block Allocators Can’t control number or size of allocated blocks Must respond immediately to all allocation requests i.e., can’t reorder or buffer requests Must allocate blocks from free memory i.e., can only place allocated blocks in free memory Must align blocks so they satisfy all alignment requirements 8 byte alignment for GNU malloc (libc malloc) on Linux boxes Can only manipulate and modify free memory Can’t move the allocated blocks once they are allocated i.e., compaction is not allowed

Goals of good malloc/free
Primary goals Good time performance for malloc and free Ideally should take constant time (not always possible)‏ Should certainly not take linear time in the number of blocks Good space utilization User allocated structures should be large fraction of the heap. Want to minimize “fragmentation”. Some other goals Good locality properties Structures allocated close in time should be close in space “Similar” objects should be allocated close in space Robust Can check that free(p1) is on a valid allocated object p1 Can check that memory references are to allocated space

Performance goals: throughput
Given some sequence of malloc and free requests: R0, R1, ..., Rk, ... , Rn-1 Want to maximize throughput and peak memory utilization. These goals are often conflicting Throughput: Number of completed requests per unit time Example: 5,000 malloc calls and 5,000 free calls in 10 seconds Throughput is 10,000 operations/second.

Performance goals: Peak mem utilization
Given some sequence of malloc and free requests: R0, R1, ..., Rk, ... , Rn-1 Def: Aggregate payload Pk: malloc(p) results in a block with a payload of p bytes.. After request Rk has completed, the aggregate payload Pk is the sum of currently allocated payloads. Def: Current heap size is denoted by Hk Assume that Hk is monotonically nondecreasing Def: Peak memory utilization: After k requests, peak memory utilization is: Uk = ( maxi<k Pi ) / Hk

Internal fragmentation
Poor memory utilization caused by fragmentation. Comes in two forms: internal and external fragmentation Internal fragmentation For some block, internal fragmentation is the difference between the block size and the payload size. Caused by overhead of maintaining heap data structures, padding for alignment purposes, or explicit policy decisions (e.g., not to split the block). Depends only on the pattern of previous requests, and thus is easy to measure. block Internal fragmentation Internal fragmentation payload

External fragmentation
Occurs when there is enough aggregate heap memory, but no single free block is large enough p1 = malloc(4)‏ p2 = malloc(5)‏ p3 = malloc(6)‏ free(p2)‏ p4 = malloc(6)‏ oops! External fragmentation depends on the pattern of future requests, and thus is difficult to measure.

Implementation issues
How do we know how much memory to free just given a pointer? How do we keep track of the free blocks? What do we do with the extra space when allocating a structure that is smaller than the free block it is placed in? How do we pick a block to use for allocation -- many might fit? How do we reinsert freed block?

Knowing how much to free
Standard method Keep the length of a block in the word preceding the block. This word is often called the header field or header Requires an extra word for every allocated block p0 = malloc(4)‏ p0 5 free(p0)‏ Block size data

Keeping track of free blocks
Method 1: Implicit list using lengths -- links all blocks Method 2: Explicit list among the free blocks using pointers within the free blocks Method 3: Segregated free list - Different free lists for different size classes Method 4: Blocks sorted by size Can use a balanced tree (e.g. Red-Black tree) with pointers within each free block, and the length used as a key 5 4 6 2 5 4 6 2

Method 1: Implicit List Need to identify whether each block is free or allocated Can use extra bit Bit can be put in the same word as the size if block sizes are always multiples of two (mask out low order bit when reading size). 1 word a = 1: allocated block a = 0: free block size: block size payload: application data (allocated blocks only)‏ size a payload Format of allocated and free blocks optional padding

Implicit list: Finding a free block
First fit: Search list from beginning, choose first free block that fits Can take linear time in total number of blocks (allocated and free)‏ In practice it can cause “splinters” at beginning of list Next fit: Like first-fit, but search list from location of end of previous search Research suggests that fragmentation is worse Best fit: Search the list, choose the free block with the closest size that fits Keeps fragments small --- usually helps fragmentation Will typically run slower than first-fit

Implicit list: Allocating in free block
Allocating in a free block - splitting Since allocated space might be smaller than free space, we might want to split the block 4 4 6 2 p void addblock(ptr p, int len) { int newsize = ((len + 1) >> 1) << 1; // add 1 and round up int oldsize = *p & -2; // mask out low bit *p = newsize | 1; // set new length if (newsize < oldsize)‏ *(p+newsize) = oldsize - newsize; // set length in remaining } // part of block addblock(p, 2)‏ 4 4 4 2 2

Implicit list: Freeing a block
Simplest implementation: Only need to clear allocated flag But can lead to “false fragmentation” There is enough free space, but the allocator won’t be able to find it 4 4 4 2 2 p free(p)‏ 4 4 4 2 2 malloc(5)‏ Oops!

Implicit list: Coalescing
Join (coelesce) with next and/or previous block if they are free Coalescing with next block But how do we coalesce with previous block? void free_block(ptr p) { *p = *p & -2; // clear allocated flag next = p + *p; // find next block if ((*next & 1) == 0) *p = *p + *next; // add to this block if } // not allocated 4 4 4 2 2 p free(p)‏ 4 4 6 2

Implicit list: Bidirectional coalescing
Boundary tags [Knuth73] Replicate size/allocated word at bottom of free blocks Allows us to traverse the “list” backwards, but requires extra space Important and general technique! 1 word Header size a a = 1: allocated block a = 0: free block size: total block size payload: application data (allocated blocks only)‏ payload and padding Format of allocated and free blocks Boundary tag (footer)‏ size a 4 4 4 4 6 6 4 4

Constant time coalescing
Case 1 Case 2 Case 3 Case 4 allocated allocated free free block being freed allocated free allocated free

Constant time coalescing (Case 1)‏
n 1 n m2 1 m2 1 m2 1 m2 1

1 m1 1 m1 1 m1 1 n 1 n+m2 n 1 m2 m2 n+m2

n+m1 m1 n 1 n 1 n+m1 m2 1 m2 1 m2 1 m2 1

n+m1+m2 m1 n 1 n 1 m2 m2 n+m1+m2

Summary of key allocator policies
Placement policy: First fit, next fit, best fit, etc. Trades off lower throughput for less fragmentation Splitting policy: When do we go ahead and split free blocks? How much internal fragmentation are we willing to tolerate? Coalescing policy: Immediate coalescing: coalesce adjacent blocks each time free is called Deferred coalescing: try to improve performance of free by deferring coalescing until needed. e.g., Coalesce as you scan the free list for malloc. Coalesce when the amount of external fragmentation reaches some threshold.

Implicit lists: summary
Implementation: very simple Allocate: linear time worst case Free: constant time worst case -- even with coalescing Memory usage: will depend on placement policy First fit, next fit or best fit Not used in practice for malloc/free because of linear time allocate. Used in many special purpose applications. However, the concepts of splitting and boundary tag coalescing are general to all allocators.

Implicit mem. mgmnt: Garbage collection
Garbage collection: automatic reclamation of heap- allocated storage -- application never has to free void foo() { int *p = malloc(128); return; /* p block is now garbage */ } Common in functional languages, scripting languages, and modern object oriented languages: Lisp, ML, Java, Perl, Mathematica, Variants (conservative garbage collectors) exist for C and C++ Cannot collect all garbage

Garbage collection How does the memory manager know when memory can be freed? In general we cannot know what is going to be used in the future since it depends on conditionals But we can tell that certain blocks cannot be used if there are no pointers to them Need to make certain assumptions about pointers Memory manager can distinguish pointers from non-pointers All pointers point to the start of a block

Memory as a graph We view memory as a directed graph
Each block is a node in the graph Each pointer is an edge in the graph Locations not in the heap that contain pointers into the heap are called root nodes (e.g. registers, locations on the stack, global variables)‏ Root nodes Heap nodes reachable Not-reachable (garbage)‏ A node (block) is reachable if there is a path from any root to that node. Non-reachable nodes are garbage (never needed by the application)‏

Mark and sweep collecting
Can build on top of malloc/free package Allocate using malloc until you “run out of space” When out of space: Use extra mark bit in the head of each block Mark: Start at roots and set mark bit on all reachable memory Sweep: Scan all blocks and free blocks that are not marked root Mark bit set Before mark After mark After sweep free free

Memory-related bugs Dereferencing bad pointers
Reading uninitialized memory Overwriting memory Referencing nonexistent variables Freeing blocks multiple times Referencing freed blocks Failing to free blocks

Dereferencing bad pointers
The classic scanf bug scanf(“%d”, val); Should be &val

Reading uninitialized memory
Assuming that heap data is initialized to zero /* return y = Ax */ int *matvec(int **A, int *x) { int *y = malloc(N*sizeof(int)); int i, j; for (i=0; i<N; i++)‏ for (j=0; j<N; j++)‏ y[i] += A[i][j]*x[j]; return y; } Should have initialized y[i] to zero (this is not bss, but heap)

Overwriting memory Allocating the (possibly) wrong sized object
int **p; p = malloc(N*sizeof(int)); for (i=0; i<N; i++) { p[i] = malloc(M*sizeof(int)); } You really want sizeof(*int)

Overwriting memory Off-by-one error int **p;
p = malloc(N*sizeof(int *)); for (i=0; i<=N; i++) { p[i] = malloc(M*sizeof(int)); } Look at the for check

Overwriting memory Not checking the max string size
Basis for classic buffer overflow attacks 1988 Internet worm Modern attacks on Web servers char s[8]; int i; gets(s); /* reads “ ” from stdin */ Don’t use gets!

Overwriting memory Referencing a pointer instead of the object it points to int *BinheapDelete(int **binheap, int *size) { int *packet; packet = binheap[0]; binheap[0] = binheap[*size - 1]; *size--; Heapify(binheap, *size, 0); return(packet); } Should be (*size)– Because * and – have same precedence and associate right to left, *size– decrements pointer and dereference it

Overwriting memory Misunderstanding pointer arithmetic
int *search(int *p, int val) { while (*p && *p != val)‏ p += sizeof(int); return p; } Operations on pointers are performed in units that are the size of what they point to – use p++ instead

Referencing nonexistent variables
Forgetting that local variables disappear when a function returns int *foo () { int val; return &val; } Once the function returns, this is not pointing to val anymore!

Freeing blocks multiple times
Nasty! x = malloc(N*sizeof(int)); <manipulate x> free(x); y = malloc(M*sizeof(int)); <manipulate y>

Referencing freed blocks
Evil! x = malloc(N*sizeof(int)); <manipulate x> free(x); ... y = malloc(M*sizeof(int)); for (i=0; i<M; i++)‏ y[i] = x[i]++;

Failing to free blocks (memory leaks)‏
Slow, long-term killer! foo() { int *x = malloc(N*sizeof(int)); ... return; }

Fabián E. Bustamante, Spring 2007

Similar presentations

Presentation on theme: "Fabián E. Bustamante, Spring 2007"— Presentation transcript:

Similar presentations

About project

Feedback

Log in

Auth with social network:

Fabián E. Bustamante, Spring 2007

Similar presentations

Presentation on theme: "Fabián E. Bustamante, Spring 2007"— Presentation transcript:

Similar presentations

About project

Feedback