1. Parul Polytechnic Institute Parul Polytechnic Institute Subject Code : 3330705 Name Of Subject : Microprocessor and assembly language programming Name of Unit : Introduction to microprocessor Topic : Instruction set architecture Name of Faculty : H.M.Avaiya & N.D.Dhameliya Name of Students: (i) DALWADI DHRUVIL P(180) (ii) MUSKAN DEVENDER S(181)

2. Topics to cover Relatively Simple Instruction Set Architecture Relatively Simple Instruction Set Architecture 8085 Microprocessor Instruction Set Architecture 8085 Microprocessor Instruction Set Architecture Analyzing the 8085 Instruction Set Architecture Analyzing the 8085 Instruction Set Architecture Summary Summary

3. Relatively Simple microprocessors, or CPU  Designed as an instructional aid and draws its features from several real microprocessors  Too limited to run anything as complex as personal computer  It has about the right level of complexity to control a microwave oven or other consumer appliance

4. Instruction Set Architecture (ISA)  Memory Model  Registers  Instruction set

5. Memory Model  This microprocessor can access 64K ( = 2 16 ) bytes of memory  Each byte has 8 bits, therefore it can access 64K  8 bits of memory  64K of memory is the maximum limit, sometimes asystem based on this CPU can have less memory  Use memory to map I/O Same instructions to use for accessing I/O devices and memory

6. Registers Accumulator (AC), is an 8-bit general purpose register Register R, is an 8-bit general purpose register. It supplies the second operand and also it can be use to store data that the AC will soon need to access. Flag Z, is an 1-bit zero flag. Z is set to 1 or 0 whenever an instruction is execute Other registers that cannot be directly accessed by programmer

7. Instruction Set  Data movement instructions  Data operation instructions  Program control instructions

8. Data movement instruction for the Relatively Simple CPU InstructionOperation NOPNo operation LDAC  AC = M[  ] STAC  M[  ] = AC MVACR = AC MOVRAC = R AC – accumulator register R – general purpose register  / M[  ] – 16-bit memory address

9. NOP -- performs no operation LDAC -- loads data from memory and stores it in the AC STAC -- copies data from AC to memory location  MVAC -- copies data in AC to register R MOVR -- copies data from R to AC

10. Data operation instruction for the Relatively Simple CPU InstructionOperation ADDAC = AC + R, If (AC + R = 0) Then Z = 1 Else Z = 0 SUBAC = AC - R, If (AC - R = 0) Then Z = 1 Else Z = 0 INACAC = AC + 1, If (AC + 1 = 0) Then Z = 1 Else Z = 0 CLACAC = 0, Z = 1 AND AC = AC  R, If (AC  R = 0) Then Z = 1 Else Z = 0 OR AC = AC  R, If (AC  R = 0) Then Z = 1 Else Z = 0 XOR AC = AC  R, If (AC  R = 0) Then Z = 1 Else Z = 0 NOT AC = AC, If (AC = 0) Then Z = 1 Else Z = 0 AC – accumulator registerR – general purpose register Z – zero flag

11. Program control instruction for the Relatively Simple CPU InstructionOperation JUMP  GOTO  JMPZ  If (Z = 1) Then GOTO  JPNZ  If (Z = 0) Then GOTO  Z – zero flag  -- 16-bit memory address

12. Note: Each instruction is having an 8-bit instruction code. LDAC, STAC, JUMP, JUMPZ, and JPNZ instructions all require a 16-bit memory address, represented by  /M[  ]. These instructions each require 3 bytes in memory.

13. Instruction formats for the Relatively Simple CPU byte 1 byte 2 byte 3 Example: 25:JUMP 1234 H instruction stored in memory: 25th byte25:0000 0101(JUMP) 26th byte26:0011 0100(34H) 27th byte27:0001 0010(12H) H -- in hexadecimal format

14. The Algorithm of the program 1:total = 0, i = 0 2:i = i + 1 3:total = total + i 4:IF i  n THEN GOTO 2 What exactly this algorithm doing is: 1+ 2 + … + (n – 1) + n Example program using Relatively Simple CPU coding

15. The Relatively Simple CPU coding of the program CLAC STAC total STAC i Loop:LDAC i INAC STAC i MVAC LDAC total ADD STAC total LDAC n SUB JPNZ Loop total = 0, i = 0 i = i +1 total = total +1 IF i  n THEN GOTO Loop

16. Relatively Simple microprocessors, or CPU  Designed as an instructional aid and draws its features from several real microprocessors  Too limited to run anything as complex as personal computer  It has about the right level of complexity to control a microwave oven or other consumer appliance

17. Instruction Set Architecture (ISA)  Memory Model  Registers Set  Instruction Set

18. Memory Model  This microprocessor is a complete 8-bit parallel Central Processing Unit (CPU).  Each byte has 8 bits  Isolated I/O, input and output devices are treated as being separate from memory. Different instructions access memory and I/O devices

19. Register Set Accumulator A, is an 8-bit register. Register B, C, D, E, H, and L, are six 8-bit general purpose register. These registers can be accessed individually, or can be accessed in pairs. Pairs are not arbitrary; BC are a pair (16- bit), as are DE, and HL Register HL is used to point to a memory location. Stack pointer, SP, is an 16-bit register, which contains the address of the top of the stack.

20. The sign flag, S, indicates the sign of a value calculated by an arithmetic or logical instruction. The zero flag, Z, is set to 1 if an arithmetic or logical operation produces a result of 0; otherwise set to 0. The parity flag, P, is set to 1 if the result of an arithmetic or logical operation has an even number of 1’s; otherwise it is set to 0. The carry flag, CY, is set when an arithmetic operation generates a carry out. The auxiliary carry flag, AC, very similar to CY, but it denotes a carry from the lower half of the result to the upper half.

21. The interrupt mask, IM, used to enable and disable interrupts, and to check for pending interrupts

22. Instruction Set  Data movement instructions  Data operation instructions  Program control instructions

23. Data movement instruction for the 8085 microprocessor InstructionOperation MOV r1, r2r1 = r2 LDA  A = M[  ] STA  M[  ] = A PUSH rp Stack = rp (rp  SP) PUSH PSWStack = A, flag register POP rp rp = Stack (rp  SP) POP PSWA, flag register = Stack IN nA = input port n OUT nOutput port n =A r, r1, r2 – any 8-bits register  / M[  ] – memory location rp – register pair BC, DE, HL, SP(Stack pointer) n – 8-bit address or data value

24. Data operation instruction for the 8085 microprocessor InstructionOperationFlags ADD rA = A + rAll ADD MA = A + M[HL]All INR rr = r + 1Not CY IN MM[HL] = M[HL] + 1Not CY DCR nr = r - 1Not CY DCR MM[HL] = M[HL] - 1Not CY XRA M A = A  M[HL] All CMP rCompare A and rAll CMA A = A None CY – carry flag

25. Program control instruction for the 8085 microprocessor InstructionOperation JUMP  GOTO  Jcond  If condition is true then GOTO  CALL  Call subroutine at  Ccond  If condition is true then call subroutine at  RETReturn from subroutine RcondIf condition is true then return from subroutine cond – conditional instructions NZ (Z = 0)Z (Z = 1)P (S = 0)N (S = 1) PO (P = 0)PE (P = 1)NC (CY = 0)C (CY = 1) Z – zero flag, S – sign flag, P – parity flag, C – carry flag

26. Note: Each instruction is having an 8-bit instruction code. Some instructions have fields to specify registers, while others are fixed.

27. Instruction formats for the Relatively Simple CPU byte 1 byte 2 Example: 25:MVIr, n instruction stored in memory: 25th byte25:00xxx110(MVI r) 26th byte26:xxxx xxxx(low-order memory) Two-byte Specifies r

28. Example: 25:MOVr1, r2 instruction stored in memory: 25th byte25:0000 0001(MOV) 26th byte26:xxxx xxxx(specifies r1) 27th byte27:yyyy yyyy(specifies r2) byte 1 byte 2 byte 3 Three-byte Example: 25:LXIrp,  instruction stored in memory: 25th byte25:00rp 0001(LXI rp) 26th byte26:xxxx xxxx(low-order memory) 27th byte27:yyyy yyyy(high-order memory) Example: 25:LXIrp,  instruction stored in memory: 25th byte25:00rp 0001(LXI rp) 26th byte26:xxxx xxxx(low-order memory) 27th byte27:yyyy yyyy(high-order memory) Specifies rp

29. The Algorithm of the program 1:total = 0, i = 0 2:i = i + 1 3:total = total + i 4:IF i  n THEN GOTO 2 n + (n - 1) + … + 1 The 8085 coding of the program LDA n MOV B, A XRA A Loop:ADD B DCR B JNZ Loop STA total Example program using 8085 microprocessor coding i = n sum = A  A = 0 sum = sum + i i = i - 1 IF i  0 THEN GOTO Loop total = sum

30. Analyzing the 8085 ISA  The 8085 CPU’s instruction set is more complete than that of the Relatively Simple CPU. More suitable for consumer appliance.  Too limited to run anything as complex as personal computer

31. Advantages of the 8085’s ISA vs. Relative Simple CPU  It has the ability to use subroutines  It can incorporate interrupts, and it has everything the programmer needs in order to process interrupts.  The register set for the 8085 is mostly sufficient, thus less coding apply which will improve task completion.

32.  The instruction set is fairly orthogonal. E.g. no clear accumulator instruction Disadvantages of the 8085’s ISA  Like the Relatively Simple CPU, it cannot easily process floating point data.

33. Summary of ISA  The ISA specifies a.an instruction set that the CPU can process b.its user accessible registers c.how it interacts with memory 2.The ISA does not specify how the CPU is designed, but it specifies what it must be able to do. 3.The ISA is concerned only with the machine language of a microprocessor because CPU only executes machine language program, not any kind of high-level program.

34.  When designing an ISA, an important goal is completeness: a.instruction set should include the instructions needed to program all desired tasks. b.instruction should be orthogonal, minimizing overlap, reducing the digital logic without reducing its capabilities within the CPU. c.CPU should includes enough registers to minimize memory accesses, and improve performance. 5.An ISA should specifies the types of data the instruction set to process.

35. 6.An ISA should specifies the addressing modes each instruction can use 7.An ISA should specifies the format for each instruction

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