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A8 MIPS vs A8 Clock Sweep Simulation May 2011
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A8 MIPS vs A8 clk sweep (L2 hit ratio of ~ 85%) L1 inst miss ratio = 0.004 L1 load miss ratio = 0.003 L1 store miss ratio = 0.003 L1 eviction ratio = 0.5976 L2 inst miss ratio = 0.1541 L2 load miss ratio = 0.1544 L2 store miss ratio = 0.1543 L2 eviction ratio = 0.1608 ipc = 2 16bit mem, no competitive load 32bit mem, no competitive load
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A8 MIPS vs A8 Clock sweep (L2 hit ratio of ~ 45%) 16bit mem, no competitive load 32bit mem, no competitive load L1 inst miss ratio = 0.004 L1 load miss ratio = 0.003 L1 store miss ratio = 0.003 L1 eviction ratio = 0.5976 L2 inst miss ratio = 0.5541 L2 load miss ratio = 0.5544 L2 store miss ratio = 0.5543 L2 eviction ratio = 0.4608 ipc = 1
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A8 MIPS vs A8 Clock sweep vs Memory Speed (L2 hit ratio of ~ 45%) 16bit, 200 MHz mem, no competitive load 32bit 200 MHz mem, no competitive load L1 inst miss ratio = 0.004 L1 load miss ratio = 0.003 L1 store miss ratio = 0.003 L1 eviction ratio = 0.5976 L2 inst miss ratio = 0.5541 L2 load miss ratio = 0.5544 L2 store miss ratio = 0.5543 L2 eviction ratio = 0.4608 ipc = 1 16bit, 333MHz mem, no competitive load 32bit, 333MHz mem, no competitive load
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