1. Lab 7 : Decoders/Encoders : Slide #2 Slide #3 Slide #4 Slide #5 Slide #6 “1 of 10” Encoder “1 of 10” Encoder Connected to a SPST Keypad. Control Signal Generator “1 of 8” Decoder. “1 of 10” Decoder.

2. Lab 7 : 1 of 10 Decoder with Active Low Outputs: A 1 of 10 decoder receives BCD data at its inputs (A3, A2, A1, A0) and activates one output (O0, …, O9). The active output is the one which corresponds to the input number. For example, If you input the number 3 it activates O3. The BCD data is applied to inputs A3, A2, A1, A0. One output is asserted for each BCD code. O0 A0 A1 A2 A3 1 of 10 Decoder O1 O2 O3 O4 O5 O6 O7 O8 O9 O1 “O0 = 0” when the BCD code for 0 is applied at the inputs. All other decoder outputs are not asserted (logic 1). Remember the outputs are active low. BCD # ONE! BCD “0” 0 0 0 0 0 1 1 1 1 1 1 1 1 1 “O1 = 0” when the BCD code for 1 is applied at the inputs. BCD “1” 1 0 0 0 1 0 1 1 1 1 1 1 1 1 “O2 = 0” when the BCD code for 2 is applied at the inputs. BCD “2” 0 1 0 0 1 1 0 1 1 1 1 1 1 1 Here are the remaining responses for BCD code for 3 … to … 9. BCD “3” 1 1 0 0 1 1 1 0 1 1 1 1 1 1 BCD “4” 0 0 1 0 1 1 1 1 0 1 1 1 1 1 BCD “5” 1 0 1 0 1 1 1 1 1 0 1 1 1 1 BCD “6” 0 1 1 0 1 1 1 1 1 1 0 1 1 1 BCD “7” 1 1 1 0 1 1 1 1 1 1 1 0 1 1 BCD “8” 0 0 0 1 1 1 1 1 1 1 1 1 0 1 BCD “9” 1 0 0 1 1 1 1 1 1 1 1 1 1 0 Four bit numbers larger than 9 do not assert any output. They are not valid BCD numbers. 1010 1011 1100 1101 1110 1111 1 1 1 1 1 1 1 1 1 1 The decoder response can be shown in a table. 0 1 1 1 1 1 1 1 1 1 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 1 1 0 0 0 0 0 0 0 1 0 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 0 A3 A2 A1 A0O0 O1 O2 O3 O4 O5 O6 O7 O8 O9 Slide #2

3. Lab 7 : 1 of 8 Decoder : The 1 of 8 decoder receives 3 bit data at its inputs (A2, A1, A0) and activates one output (O0, …, O7). It is similar in operation to the 1 of 10 decoder. What makes it different is that it has “ENABLE” inputs (E1, E2, E3). “O0 = 0” when the 3 bit code for 0 is applied at the inputs. All other decoder outputs are not asserted (logic 1). Remember the outputs are active low. 3 Bit “0” 0 0 0 0 1 1 1 1 1 1 1 “O1 = 0” when the 3 bit code for 1 is applied at the inputs. Here are the remaining responses for 3 bit code for 2 … to … 7. The ENABLE inputs provide a means to enable the decoder to decode 3 bit numbers or else disable the decoder from decoding. All 3 inputs must be asserted (E1=E2=0 and E3=1) in order for the decoder to decode the 3 bit number applied to the inputs. The decoder response can be shown in a table. 0 1 1 1 1 1 1 1 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 0 0 0 1 0 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 0 A2 A1 A0O0 O1 O2 O3 O4 O5 O6 O7 O0 A0 A1 A2 1 of 8 Decoder O1 O2 O3 O4 O5 O6 O7 O1 E1 E2 E3 The ENABLE inputs will be described later. For now they will be asserted and overlooked. 5V 3 Bit “1” 1 0 0 1 0 1 1 1 1 1 1 3 Bit “2” 0 1 0 1 1 0 1 1 1 1 1 3 Bit “3” 1 1 0 1 1 1 0 1 1 1 1 3 Bit “4” 0 0 1 1 1 1 1 0 1 1 1 3 Bit “5” 1 0 1 1 1 1 1 1 0 1 1 3 Bit “6” 0 1 1 1 1 1 1 1 1 0 1 3 Bit “7” 1 1 1 1 1 1 1 1 1 1 0 If any of the 3 enables is not asserted then all outputs =1 regardless of the 3 bit number applied to the inputs. IF E1 =0 & E2=0 & E3=1 X X X 1 1 1 1 1 1 1 1 IF E1 =1 or E2=1 or E3=0 X = Don’t care … immaterial … 1 or 0! Slide #3

4. 1 1 1 1 1 1 1 1 1 0 0 0 0 BCD 0 BCD Data O3 O2 O1 O0 A1 A2 A3 A4 A5 A6 A7 A8 A9 X X X X X X X X 0 1 0 0 1 BCD 9 X X X X X X X 0 1 1 0 0 0 BCD 8 X X X X X X 0 1 1 0 1 1 1 BCD 7 X X X X X 0 1 1 1 0 1 1 0 BCD 6 X X X X 0 1 1 1 1 0 1 0 1 BCD 5 X X X 0 1 1 1 1 1 0 1 0 0 BCD 4 X X 0 1 1 1 1 1 1 0 0 1 1 BCD 3 X 0 1 1 1 1 1 1 1 0 0 1 0 BCD 2 0 1 1 1 1 1 1 1 1 0 0 0 1 BCD 1 X = Don’t care … immaterial … 1 or 0! Lab 7 : 1 of 10 Encoder : The 1 of 10 priority encoder will generate a BCD data code at its outputs (O3, O2, O1, O0) when an input is asserted. The BCD data generated at the output corresponds to the input number which is activated. It is a reverse decoder. O0 1 of 10 Encoder O1 A2 O2 O3 A1 A3 A4 A5 A6 A7 A8 A9 The encoder will generate a BCD 1 when input A1 asserted. 0 1 0 0 1 0 1 1 1 1 1 1 1 Activate A1 BCD 1 The encoder will generate a BCD 2 when input A2 asserted. 1 0 0 0 0 1 1 1 1 1 1 1 1 Activate A2 BCD 2 Here are the remaining responses for when inputs A3 … to … A9 are asserted. 0 0 1 0 1 1 1 0 1 1 1 1 1 Activate A4 BCD 4 1 1 0 0 1 1 0 1 1 1 1 1 1 Activate A3 BCD 3 0 1 1 0 1 1 1 1 0 1 1 1 1 Activate A5 BCD 5 1 0 1 0 1 1 1 1 1 0 1 1 1 Activate A6 BCD 6 1 1 1 0 1 1 1 1 1 1 0 1 1 Activate A7 BCD 7 0 0 0 1 1 1 1 1 1 1 1 0 1 Activate A8 BCD 8 0 1 0 1 1 1 1 1 1 1 1 1 0Activate A9 BCD 9 There is no A0 input. The encoder generates the BCD code for 0 when no inputs are activated. 0 0 0 0 1 1 1 1 1 1 1 1 1 Do not activate any input! BCD 0 This encoder is called a priority encoder. A9 has the highest priority and A1 the lowest. All this means is that the encoder will generate the code for the highest priority input if 2 (or more) inputs are asserted at same time. 1 1 1 0 1 1 0 1 1 1 0 1 1 Activate A3 AND Activate A7 The code for BCD 7 is generated because A7 has a higher priority than A3. The encoder response can be shown in a table. Slide #4

5. Lab 7 : SPST Keypad System : The 1 of 10 priority encoder is typically used to generate BCD data from an SPST keypad (single pole single throw). The system generates the BCD code for the key that is pressed. The SPST keypad consist of 10 switches mounted in a plastic panel. The schematic symbol is circled. S0 Let’s see how the system works if someone holds down button 3. 0 1 1 1 1 1 1 1 1 S3 closes and grounds A3. A1, A2, A4, …, A9 stay at logic 1 because of the pull-up resistors. The encoder outputs the data code for 3. 1 1 0 0 3 Slide #5 3

6. Control Wave Lab 7 : Control Signal Generator : A counter and a 1 of 4 decoder with active low outputs are combined to create a system that can generate a control waveforms. The analysis begins by drawing the waveforms for the Mod 8 counter. Q0, Q1, Q2 CLK Q0 Q1 Q2 To draw the control waveform it is easy if you remember that the 2 bit data in must be 2 and the Enable must be asserted (active high). Thus output O2 = 0 when A1=1, A0=0 and Enable=1. Draw the control waveform. It is 0 during this time interval only. The control waveform is 1 for all other time intervals. Test yourself: Try to figure out when the Control Waveform would be low if O1 were used in place of O2. Proceed after you have made your decision. O1=0 when En=1, A0=1, A1=0 Slide #6 O0 A0 A1 1 of 4 Decoder O1 O2 O3 O1 EnableQ0 Mod 8 Counter O1 Q2 O1Q1 >Clk Control Waveform En. A0 A1 1 0 1 0