1. Energy Efficiency, Arithmetics and Design Effort on FPGAs Case study: Reconfigurable Miniature Sensor Nodes for Condition Monitoring Teemu Nyländen, Jani Boutellier, Karri Nikunen, Jari Hannuksela, Olli Silvén

2. Introduction WSNs for condition monitoring –Wide range of algorithms with very different processing needs –Need to adapt to prevailing energy conditions –Cheap and low power –Fixed design out of question Floating point vs Fixed point –Typically fixed point preferred in embedded designs –Floating point designs do not necessarily carry energy efficiency penalty –The design time and effort speaks for floating point designs FPGAs vs ASICs — ASICs usually targeted to a larger spectrum of users and applications — FPGA based implementations can be made more specific

3. Our TTA mote  Flash FPGAs help to avoid overprovisioning and provide for energy efficient implementations that rival off-the-shelf SoCs for sensor node designs  Floating point implementations rival fixed point designs  Transport triggered architecture (TTA) is an attractive framework for designs  Instruction level parallelism at low programmability overheads

4. Why wireless? Wouldn’t it be much easier to use wired solutions? –Connections break easily –Maintenance a major expenditure –Wired solutions cannot be used everywhere –Wireless is simply easier, cheaper and enables condition monitoring in places formerly impossible http://www.hub-4.com/news/s1/5000/compact- online-sensor-monitors-condition-of-vibrating- screens-pumps-and-motors

5. Why energy autonomous? There is plenty of energy available in the industrial environment. Why do you need energy harvesting? –Energy harvesting enables wireless solutions –Batteries cannot always be replaced –Currently battery/super condensator needed http://vibpower.w3.kanazawa-u.ac.jp/about-e.html

6. Why not just use off-the- shelf WSN solutions or ASICs? Off-the-shelf solutions are often compromises –Target as wide spectrum of users as possible –Low power consumption –Low power consumption but poor performance or vice versa ASICs –Very low power, very energy effiecient –Long design and testing times –Fixed

7. Flash vs SRAM FPGA Altera Cyclone III + Embedded multipliers + Unlimited reprogrammability + Logic element composition (4LUT) - Higher static and therefore total power consumption Actel Igloo + Designed for energy efficiency + Very low static power consumption - Limited reprogrammability - Logic element composition (3LUT) - No embedded multipliers - 130 nm technology

8. Power dissipation ARITHMETIC CORE VOLTAGE (V) Clock (MHz) TOTAL POWER DISSIPATION (mW) DYNAMIC POWER DISSIPATION (mW) 32-bit Floating point1.21159.417.45 32-bit Floating point1.24572.7720.81 32-bit Fixed point1.21559.787.82 32-bit Fixed point1.26078.1826.22 ARITHMETIC CORE VOLTAGE (V) Clock (MHz) TOTAL POWER DISSIPATION (mW) DYNAMIC POWER DISSIPATION (mW) 32-bit Floating point 1.2118.968.90 32-bit Floating point1.52025.2225.01 32-bit Fixed point1.21512.6112.55 32-bit Fixed point1.53040.4240.20 16-bit Floating point1.2156.746.68 16-bit Floating point1.53021.7821.56 16-bit Fixed point1.2157.016.96 16-bit Fixed point1.53021.8721.65

9. Our TTA mote 32-bit,16-bit floating point and 16-bit fixed point More about TTAs: http://tce.cs.tut.fi

10. Bearing fault monitoring Time and frequency based analysis –Time: RMS, Kurtosis,... –Frequency: Spectrum analysis Processing needs vary greatly Analysis based on the energy state

11. Floating point vs Fixed point ArithmeticSilicon Area (Actel Versatiles) Power Dissipation (mW) Notes 16-bit FXP8000.064Unnormalized 16-bit FLP13500.164Incl. normalization

12. Floating point vs Fixed point ArithmeticPower Dissipation (mW) Energy Consumption 256-FFT (uJ) Throughput (FFT/mJ) 16-bit FLP20.08475.3614.6 16-bit FXP20.68894.7412.9

13. TTA mote vs off-the-shelf solutions PlatformMaximum Clock Rate (MHz) Total power dissipation (mW) MICAz433 TelosB83 Proposed TTA 16-bit FLP 204.179 @ 4 MHz Proposed TTA 16-bit FLP 208.303 @ 8 MHz

14. TTA mote vs TelosB PlatformTotal Energy Consumption uJ @ 4.1 MHz Maximum Clock Rate (MHz) TelosB 64-FFT FXP 119.68 TelosB 256-FFT FXP 604.28 Proposed TTA 64-FFT FLP 14.8720 Proposed TTA 256-FFT FLP 68.2820

15. THANK YOU!