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Discussion of: “Terrestrial-based Radiation Upsets: A Cautionary Tale” CprE 583 Tony Kuker 12/06/05
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Presentation Objective The objective of this presentation is to present the information found within the paper entitled “Terrestrial-based Radiation Upsets: A Cautionary Tale” This paper was presented at the 13 th annual IEEE Symposium on Field- Programmable Custom Computing Machines
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Paper Objective Introduce cosmic radiation induced soft errors Discuss Methods of calculating and estimating Soft Error Rates (SER) Previous SER testing results Application of SERs to reconfigurable supercomputers Introduce Mitigation Techniques for FPGA designs
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Soft Errors Computing systems are susceptible to soft errors caused by terrestrial radiation Neutron radiation-induced upsets can result in bit-flips in SRAM Neutron radiation is often overlooked in system design
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Estimating SER Computed as a function of Neutron Flux Cross Section (sigma) LocationAltitude(ft)>10MeV Flux San Jose014.4 Albuquerque5,20053.28 Los Alamos7,20090.00 White Mountain 12,000338.40 Mauna Kea13,500229.57 Military Aircraft60,0004680.00
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FPGA Testing Efforts Xilinx Rosetta Tests iRoC Technology Tests Altera Tests
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Xilinx Rosetta Project 10 x 10 grid of Xilinx XC2V6000 chips Four of these grids were placed at various altitudes LocationFluxHoursUpsetsMTTU San Jose14.401063261772.00 Albuquerque53.281353634398.12 Mauna Kea229.57216018120.00 White Mountain338.4054966683.30
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iRoC Technology Test Similar to Rosetta Used Particle Accelerator at Los Alamos National Laboratory to perform testing Included components from Actel, Xilinx and Altera MTTU for a 100 device setup (like Rosetta): LocationActel Axcelerator AX1000 Actel ProASIC+ APA1000 Xilinx Virtex-II XC2V3000 Xilinx Spartan-3 XC3S100 Altera Cyclone EP1C20 San Jose1.83e83.95e81.73e31.21e4X Albuquerque4.94e71.07e84.67e23.27e3X Mauna Kea1.15e72.48e71.08e27.59e2X White Mountain 7.78e61.68e75.15e23.34e1X
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Altera Test Altera presented soft error rates for their devices in 2004 The Altera results were marginally better than the Xilinx Rosetta results
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Memory Cells Testing results of SRAM and DRAM from iRoC and IBM Error rate for a single bit is relatively small As sizes increase, so does probability of soft error Parity, ECC and Chipkill can reduce upset rates Altitude(ft)(Upset)/(Bit Hour) For 1MB (Upset)/(Bit Hour) For 1GB 01.68e-121.4e-80.01 30,0002.63e-92.2e-522.59 65,0001.45e-81.2e-4124.55
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Microprocessors Vulnerable to upsets in L1, L2 and L3 cache Most modern processors have soft error protection on caches. Register files are also vulnerable within the microprocessor Location1 MB of Parity Memory1 MB of ECC Memory San Jose1.20e73.06e11 Albuquerque3.25e68.28e10 Mauna Kea7.54e51.3e10 White Mountain5.11e51.3e10
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Cray XD1 Reconfigurable supercomputer utilizing combination of SIMD processors and FPGAs Integrates Xilinx Virtex-4 FPGAs into the computing environment via software APIs Cray XD1 MTTU (Hours) LocationFPGAMicroprocessorMemoryTotal San Jose14264.353.06e1112166.676566.13 Albuquerque3855.238.28e103288.291774.63 Mauna Kea894.751.92e10763.17411.87 White Mountain606.991.30e10515.73279.41
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Mitigation Schemes Support Logic Methods SEU Controller Selective Triple Modular Redundancy Partial Configuration Methods Single Frame Correction Processor-based Detection of Critical Upsets Scrubbing with CRC Check
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Relevance As computing systems become more complex, terrestrial-based radiation upsets become more and more complex Awareness of the issue and mitigation techniques may improve reliability of reconfigurable systems
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Comments Good summary of FPGA testing results Explained calculations effectively Could have used more discussion of memory soft error mitigation techniques Flash-backed and anti-fused FPGAs
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References Terrestrial-based Radiation Upsets: A Cautionary Tale, Heather Quinn & Paul Graham, 2005 Cray XD1 Supercomputer Overview http://www.cray.com http://www.cray.com
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