1. Simplifying the Integration of Processing Elements in Computing Systems using a Programmable Controller By Lesley Shannon and Paul Chow University of Toronto

2. Overview Motivation Computing System Design and Architecture SIMPPL Controller Future Work

3. Motivation FPGAs are used to implement increasingly complex designs Need to minimize system design time Previously designed modules can be reused as Processing Elements (PEs)

4. Objective Simplify the reuse of PEs in new applications –Facilitate the physical integration of PEs –Abstract data transfers from the physical design –Make it easier for designers to alter a PE’s functionality

5. Solution Standardize the physical interconnections between modules Standardize the communication protocols for passing data between modules Separate the functionality from the communication protocols

6. The SIMPPL Model

8. How a Hardware CE Works

9. Internal Structure of a Hardware CE

11. SIMPPL Controller Datapath

12. Instruction Packet Format

13. Instruction Types Immediate Data Transfer Immediate Data + Immediate Address Address Register Initialization Address Register Arithmetic Immediate Data + Indirect Addressing Immediate Data + Autoincrementing Wait Receive Noop Reset

14. Internal Structure of a Hardware CE

15. SIMPPL Controller Sequencer

16. A SIMPPL Example

17. write start addr to a0; for (i=0; i<1024; i++) { while (!valid_sensor_data); write 8 data words starting at addr (a0); a0 = a0 + 8; } return;

18. SIMPPL Controller Sequencer

19. Done state: nextPC = Done state; } Sensor Unit SCS Program Counter Write autoinc state: if (SampleCntr=1024) nextPC = Done state; else nextPC = Write autoinc state; if (rst=1){ PCstate <= Write a0 state; else PCstate <= nextPC; } Write a0 state: if ((Instruction Read) && (rst=0)) nextPC = Write address state; else nextPC = Write a0 state; Write address state: if (Instruction Read) nextPC = Write autoinc state; else nextPC = Write address state; //Next-state state machine for the PC: Case(PCstate){ write start addr to a0; return; for (i=0; i<1024; i++) { while (!valid_sensor_data); write 8 data words starting at addr (a0); a0 = a0 + 8; }

20. SIMPPL Controller Sequencer

21. Done state: valid_instruction = 0; } Done state: program_word = Stall controller; program_control_bit = 0; } Sensor Unit SCS Program Write autoinc state: program_word = Write data line instr; program_control_bit = 1; Write autoinc state: valid_instruction = valid_sensor_data; Write a0 state: program_word = Write a0 instruction; program_control_bit = 1; Write address state: program_word = Write address to a0; program_control_bit = 0; Write a0 state: valid_instruction = 1; Write address state: valid_instruction = 1; Case(PCstate){ write start addr to a0; return; for (i=0; i<1024; i++) { while (!valid_sensor_data); write 8 data words starting at addr (a0); a0 = a0 + 8; }

22. Streaming System Architecture

23. Snap-Shot System Architecture

24. Controller Implementation Results

25. SCS Implementation Results

26. Both systems were implemented on-chip in 6 hours!

27. Adding to the System

28. Summary Described the SIMPPL computing model that significantly reduces design time Created a hardware CE architecture to simplify PE reuse Demonstrated that CEs can easily be adapted to different applications

29. Future Work What types of on-chip debugging and verification tools can be used for designing with the SIMPPL model? Can the SCS be autogenerated from a high-level description? Can a PE-specific controller be generated from a high-level description?

30. Simplifying the Integration of Processing Elements in Computing Systems using a Programmable Controller Thank you.

31. Standardizing IP Interconnect

32. Snap-Shot System Architecture

33. Shared Memory Computing Element

34. Reusing Processing Elements PEs may require redesign to be incorporated into new Computing Systems due to: –Differences in the physical interface –Differences in the communication protocols –Differences in the functional requirements

35. Controller Implementation Results

36. Design Space Data Intensive systems Point-to-Point Communications (Directed Communications) Modular Design

37. Example: Block Diagram of MPEG4