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1 Reconfigurable Hardware Thomas Polzer 0325077
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2 Overview Definition Definition Methods Methods Devices Devices Applications Applications Problems Problems Hardware or Software? Hardware or Software?
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3 Definition Configurable Hardware Configurable Hardware Already seen in previous talk A piece of hardware which can change its functionality according to a configuration. Configuration only changed by developer Reconfigurable Hardware Reconfigurable Hardware Special kind of configurable hardware Configuration can be changed while device is operational
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4 FPGA Layout Source: [4]
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5 Methods (I) Complete Reconfiguration Complete Reconfiguration Whole configuration updated Normally done by operator/developer Device must be reinitialized Partial Reconfiguration Partial Reconfiguration Difference based Module base
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6 Methods (II) Difference Based Partial Reconfiguration Difference Based Partial Reconfiguration New and old configuration compared Only changes are reprogrammed Whole column reprogrammed
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7 Methods (III) Module Based Partial Reconfiguration Module Based Partial Reconfiguration Design partitioned into modules Each module can be replaced in runtime Other modules stay operational Size and shape Whole column Whole column Rectangle Rectangle Special interfaces between modules
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8 Methods (IV) Source: [1]
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9 Methods (V) Controller Controller internal external Source:[2]
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10101010 Devices (I) Xilinx Xilinx Spartan-3 series Complete reconfiguration (only A and E series) Complete reconfiguration (only A and E series) Difference based partial reconfiguration Difference based partial reconfiguration Virtex series Complete reconfiguration Complete reconfiguration Difference based partial reconfiguration Difference based partial reconfiguration Module based partial reconfiguration Module based partial reconfiguration
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11111111 Devices (II) Altera Altera Stratix series Complete reconfiguration Complete reconfiguration Cyclone series Complete reconfiguration Complete reconfiguration Atmel Atmel Field Programmable System Level Integrated Circuits (FPSLIC) Complete reconfiguration Complete reconfiguration Module based partial reconfiguration Module based partial reconfiguration
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12121212 Devices (III) Lattice Lattice ORCA series Complete Complete Difference based partial reconfiguration Difference based partial reconfiguration Module based partial reconfiguration Module based partial reconfiguration
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13131313 Applications (I) Increased Fault Tolerance Increased Fault Tolerance Monitoring of functional units In case of failure -> reconfigure empty space to replace it Increased Capacity Increased Capacity Not all functional units deployed simultaneously Remote Update Remote Update Download a new configuration via serial line or network
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14141414 Applications (II) Speed-Up Speed-Up Special modules loaded on demand Modules depending on task Reduction of power consumption Reduction of power consumption Not all modules active Inactive modules are not deployed No power consumption by that modules
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15151515 Problems Corrupted Configuration Data Corrupted Configuration Data Possible solution: Fall back configuration Security Security Unauthorized changes to hardware “Stealing” of the configuration Safety Safety New layer of complexity Harder to test Harder to test Harder to guarantee correctness Harder to guarantee correctness Unwanted reconfigurations
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16161616 Hardware/Software Why it is Hardware Why it is Hardware Still a system of logic gates Inherent parallelism remains Short execution time Why it is Software Why it is Software Has all the dynamic properties of software Adaption to specific problems at runtime Adaption to specific problems at runtime Adaptive algorithms Adaptive algorithms Partly sequential operation Easy to update
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17171717 End Thank you for your attention!
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18181818 References 1 - Xilinx Application Note 290 1 - Xilinx Application Note 290 2 - Hiibner, Schuck, Kiihnle, Becker - New 2-dimensional partial dynamic reconfiguration techniques for real-time adaptive microelectronic circuits - IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures, 2006 2 - Hiibner, Schuck, Kiihnle, Becker - New 2-dimensional partial dynamic reconfiguration techniques for real-time adaptive microelectronic circuits - IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures, 2006 3 – AT94S40AL datasheet 3 – AT94S40AL datasheet 4 - Sedcole, Blodget, Becker, Anderson, Lysaght - Modular dynamic reconfiguration in Virtex FPGAs - IEEE Proc.-Comput. Digit. Tech., Vol. 153, No. 3, May 2006 4 - Sedcole, Blodget, Becker, Anderson, Lysaght - Modular dynamic reconfiguration in Virtex FPGAs - IEEE Proc.-Comput. Digit. Tech., Vol. 153, No. 3, May 2006 5 - Emmert, Stroud, Skaggs - Dynamic Fault Tolerance in FPGAs via Partial Reconfiguration 5 - Emmert, Stroud, Skaggs - Dynamic Fault Tolerance in FPGAs via Partial Reconfiguration 6 - ORCA Series 3C and 3T FPGAs Data Sheet 6 - ORCA Series 3C and 3T FPGAs Data Sheet 7 – Amir H. Sheikh Zeineddini - Secure Partial Reconfiguration of FPGAs – Master Thesis - 2005 7 – Amir H. Sheikh Zeineddini - Secure Partial Reconfiguration of FPGAs – Master Thesis - 2005
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