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Unified Approach to the Design of Modulo-(2 n ± 1) Adders Based on Signed-LSB Representation of Residues Ghassem Jaberipur Dept. Electrical & Computer Engr. Shahid Beheshti Univ., Tehran, Iran jaberipur@sbu.ac.ir Behrooz Parhami Dept. Electrical & Computer Engr. Univ. of California, Santa Barbara, USA parhami@ece.ucsb.edu 19th IEEE International Symposium on Computer Arithmetic Portland, Oregon, USA, June 8-10, 2009
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19th IEEE International Symposium on Computer Arithmetic Portland, Oregon, USA, June 8-10, 2009 Unified Approach to the Design of Modulo-(2 n ± 1) Adders Based on Signed-LSB Representation of Residues Outline Introduction Background Signed-LSB Representation New Modulo-(2 n ± 1) Adders – Mod-(2 n + 1) Adder – Mod-(2 n – 1) Adder Conversion from/to Binary Comparisons & Applications Conclusion 2
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19th IEEE International Symposium on Computer Arithmetic Portland, Oregon, USA, June 8-10, 2009 Unified Approach to the Design of Modulo-(2 n ± 1) Adders Based on Signed-LSB Representation of Residues Introduction Renewed interest in RNS arithmetic Separate designs for mod-(2 n ± 1) and mod-2 n Error-prone and labor-intensive optimizations New signed-LSB representation of residues Sole use of standard arithmetic building blocks Greater confidence in correctness Configurable RNS processor for fault tolerance 3
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19th IEEE International Symposium on Computer Arithmetic Portland, Oregon, USA, June 8-10, 2009 Unified Approach to the Design of Modulo-(2 n ± 1) Adders Based on Signed-LSB Representation of Residues Background: Mod-(2 n – 1) Addition Mod-m: Mod-(2 n –1): 4
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19th IEEE International Symposium on Computer Arithmetic Portland, Oregon, USA, June 8-10, 2009 Unified Approach to the Design of Modulo-(2 n ± 1) Adders Based on Signed-LSB Representation of Residues Background: Symbols Used 5
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19th IEEE International Symposium on Computer Arithmetic Portland, Oregon, USA, June 8-10, 2009 Unified Approach to the Design of Modulo-(2 n ± 1) Adders Based on Signed-LSB Representation of Residues Background: Mod-2 n Adder 6
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19th IEEE International Symposium on Computer Arithmetic Portland, Oregon, USA, June 8-10, 2009 Unified Approach to the Design of Modulo-(2 n ± 1) Adders Based on Signed-LSB Representation of Residues Kalamboukas et al., 2005 7 RPP modulo 255 adderTPP modulo 255 adder Background: Mod-(2 n – 1) Adders
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19th IEEE International Symposium on Computer Arithmetic Portland, Oregon, USA, June 8-10, 2009 Unified Approach to the Design of Modulo-(2 n ± 1) Adders Based on Signed-LSB Representation of Residues Background: Mod-(2 n + 1) Addition Mod-(2 n +1): W' is difficult to compute, therefore, let 8
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19th IEEE International Symposium on Computer Arithmetic Portland, Oregon, USA, June 8-10, 2009 Unified Approach to the Design of Modulo-(2 n ± 1) Adders Based on Signed-LSB Representation of Residues Background: Mod-(2 n + 1) Adders Efstathiou, et al., 2004 9 Flaw: S n is wrong
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19th IEEE International Symposium on Computer Arithmetic Portland, Oregon, USA, June 8-10, 2009 Unified Approach to the Design of Modulo-(2 n ± 1) Adders Based on Signed-LSB Representation of Residues Background: Mod-(2 n + 1) Adders The corrected mod-257 TPP adder 10 Same Latency More area
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19th IEEE International Symposium on Computer Arithmetic Portland, Oregon, USA, June 8-10, 2009 Unified Approach to the Design of Modulo-(2 n ± 1) Adders Based on Signed-LSB Representation of Residues Background: Dim-1 Representation Diminshed-1 mod-(2 n + 1) 11
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19th IEEE International Symposium on Computer Arithmetic Portland, Oregon, USA, June 8-10, 2009 Unified Approach to the Design of Modulo-(2 n ± 1) Adders Based on Signed-LSB Representation of Residues Signed-LSB Representation Faithful representation of [–1, 2 n – 1] Problem: Mixed posibits and negabits: A + B 12
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19th IEEE International Symposium on Computer Arithmetic Portland, Oregon, USA, June 8-10, 2009 Unified Approach to the Design of Modulo-(2 n ± 1) Adders Based on Signed-LSB Representation of Residues Universal Full Adders Full adder can compress mixed posibits and negabits 13 ||X 1 + X 2 + x 3 || = X 1 – 1 + X 2 – 1 + x 3 = 2c + s – 2 = ||2C + s||
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19th IEEE International Symposium on Computer Arithmetic Portland, Oregon, USA, June 8-10, 2009 Unified Approach to the Design of Modulo-(2 n ± 1) Adders Based on Signed-LSB Representation of Residues New Modulo-(2 n + 1) Adder 14
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19th IEEE International Symposium on Computer Arithmetic Portland, Oregon, USA, June 8-10, 2009 Unified Approach to the Design of Modulo-(2 n ± 1) Adders Based on Signed-LSB Representation of Residues Mod-(2 n + 1) Signed-LSB Addition 15
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19th IEEE International Symposium on Computer Arithmetic Portland, Oregon, USA, June 8-10, 2009 Unified Approach to the Design of Modulo-(2 n ± 1) Adders Based on Signed-LSB Representation of Residues New Mod-(2 n – 1) Adder 16
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19th IEEE International Symposium on Computer Arithmetic Portland, Oregon, USA, June 8-10, 2009 Unified Approach to the Design of Modulo-(2 n ± 1) Adders Based on Signed-LSB Representation of Residues Mod-(2 n + 1) vs. Mod-(2 n – 1) 17
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19th IEEE International Symposium on Computer Arithmetic Portland, Oregon, USA, June 8-10, 2009 Unified Approach to the Design of Modulo-(2 n ± 1) Adders Based on Signed-LSB Representation of Residues Conversion from/to Binary 18 Weighted representation Conversion of input to residue representation is very simple Fast residue-to-binary converters implement the Chinese remainder theorem via CSAs Weighted representation Signed-LSB representation
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19th IEEE International Symposium on Computer Arithmetic Portland, Oregon, USA, June 8-10, 2009 Unified Approach to the Design of Modulo-(2 n ± 1) Adders Based on Signed-LSB Representation of Residues Applications Fault-tolerant RNS processor 19
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19th IEEE International Symposium on Computer Arithmetic Portland, Oregon, USA, June 8-10, 2009 Unified Approach to the Design of Modulo-(2 n ± 1) Adders Based on Signed-LSB Representation of Residues Comparison: Gate-Level Analysis 20 RepresentationModulusRPPTPPRef. Weighted2 n + 12 log n + 92 log n + 6[1] Diminished-12 n + 12 log n + 72 log n + 5[9] Signed-LSB2 n + 12 log n + 72 log n + 5New Weighted2 n – 12 log n + 52 log n + 3[5] Signed-LSB2 n – 12 log n + 72 log n + 5New
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19th IEEE International Symposium on Computer Arithmetic Portland, Oregon, USA, June 8-10, 2009 Unified Approach to the Design of Modulo-(2 n ± 1) Adders Based on Signed-LSB Representation of Residues Comparison: Synthesis Results 21 RepresentationModulus Delay (ns)Critical pathArea ( m 2 ) Weighted 2 4 + 10.4214 a4 s1a4 s1 1618 Diminished-1 2 4 + 10.2935 a0 s0a0 s0 1346 Signed-LSB 2 4 + 10.3003 a0 s3a0 s3 1402 Weighted 2 4 – 10.2820 a2 s2a2 s2 1173 Signed-LSB 2 4 – 10.3075 a0 s0a0 s0 1292 Weighted; 2 8 + 10.5117 b5 s6b5 s6 4793 Diminished-1 2 8 + 10.4998 b3 s2b3 s2 3498 Signed-LSB 2 8 + 10.4999 b1 s1b1 s1 3678 Weighted 2 8 – 10.3999 a0 s5a0 s5 2299 Signed-LSB 2 8 – 10.4998 a0 s6a0 s6 3161 Weighted 2 16 + 10.6207 a 16 s 7 6927 Diminished-1 2 16 + 10.5791 a 13 s 12 6377 Signed-LSB 2 16 + 10.5803 b4 s5b4 s5 6733 Weighted 2 16 – 10.4868 a 13 s 5 5850 Signed-LSB 2 16 – 10.5901 a9 s8a9 s8 6243
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19th IEEE International Symposium on Computer Arithmetic Portland, Oregon, USA, June 8-10, 2009 Unified Approach to the Design of Modulo-(2 n ± 1) Adders Based on Signed-LSB Representation of Residues Conclusion Implementing mod-(2 n – 1) and mod-(2 n + 1) addition using generic CSA and binary adders Easier/faster exploration of the design space Simpler testing and verification Greater confidence in design correctness Configurable modular adders (fault tolerance) Potential for less complex modular subtractors and modular multipliers 22
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19th IEEE International Symposium on Computer Arithmetic Portland, Oregon, USA, June 8-10, 2009 Unified Approach to the Design of Modulo-(2 n ± 1) Adders Based on Signed-LSB Representation of Residues Questions? The authors gratefully acknowledge the assistance of Mr. Saeed Nejati and Ms. Hanieh Alavi. G. Jaberipur also acknowledges support from IPM School of Computer Science and from Shahid Beheshti University. Supplement at: www.ece.ucsb.edu/~parhami/publications.htm 23
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