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hsabaghianb @ kashanu.ac.ir Microprocessors 6-1 I/O Devices Switches, LED, LCD Lec note 6
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-2 I/O devices ( Peripherals) Examples: switches, LED, LCD, printers, keyboard, keypad Interface chips are needed to resolve the speed problem synchronizes data transfer between CPU and I/O device Connection of Interface and CPU Data pins are connected to CPU data bus I/O port pins are connected to I/O device CPU may be connected to multiple interface IO ports are simplest interface
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-3 I/O Interfacing Dedicated instructions for IO operations (Isolated I/O) same instruction for memory and IO (memory-mapped I/O) MCS-51 (8051) is memory mapped
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-4 Synchronization of CPU and interface chip To make sure that there are valid data in the interface two ways Polling method: Read status bit - Simple method Interrupt driven method: interface interrupts the CPU when it has new data - CPU executes the ISR
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-5 Synchronization of CPU and interface chip Output synchronization: two ways of doing this 1.Polling method interface chip uses a status bit to indicate that the data register is empty CPU keeps checking status bit until it is set, and then writes data into interface chip 2.Interrupt driven method: interface chip interrupts the CPU when it data register is empty. CPU executes the ISR
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-6 Synchronization of CPU and interface chip Methods used to synchronize data transfer between interface chip and I/O devices: 1.Brute force method: interface chip returns voltage levels in its input ports to CPU and makes data written by CPU directly available on its output ports All 8051 port can perform brute force I/O 2.Strobe method: During input, the I/O device activates a strobe signal when data are stable. Interface chip latches the data For output, interface chip places output data on output port. when data is stable, it activates a strobe signal. I/O device latches the data 3.Handshake method: two handshake signals are needed One is asserted by interface chip and the other by I/O device
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-7 8051 - Switch On I/O Ports Case-1: Gives a logic 0 on switch close Current is 0.5ma on switch close Case-2: Gives a logic 1 on switch close High current on switch close Case-3: Can damage port if 0 is output
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-8 Simple input devices DIP switches usually have 8 switches Use the case-1 from previous page Sequence of instructions to read is: MOVP1,#FFH MOVA,P1,
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-9 Bouncing contacts Contact: Push-button switches Toggle switches Electromechanical relays Make and break Contact normally open switch The effect is called "contact bounce" or, in a switch, "switch bounce”. If used as edge-triggered input (as INT0), several interrupt is accorded
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-10 Hardware Solution An RC time constant to suppress the bounce The time constant has to be larger than the switch bounce Vcc OUT
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-11 Hardware Solution
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-12 Software Solution Read the new state of switch N time Wait-and-see technique When the input drops an “appropriate” delay is executed (10 ms) then the value of the line is checked again to make sure the line has stopped bouncing
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-13 Interfacing a Keypad 16 keys arranged as a 4X4 matrix Place a 0 on R0 port Read C port If there is a 0 bit then the button at the column/row intersection has been pressed. Otherwise, try next row Repeat constantly 0123 567 DEF 9AB C 8 4
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-14 Interfacing a Keypad scan:movP1,#EFH jnbP1.0,db_0 scan1:jnbP1.1,db_1 scan2:jnbP1.2,db_2 scan3:jnbP1.3,db_3 scan4:movP1,#DFH jnbP1.0,db_4 ….. P1.3 P1.2 P1.1 P1.0 P1.7 P1.6 P1.5 P1.4 0123 567 DEF 9AB C 8 4 8051
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-15 Interfacing a Keypad db_0:lcallwt_10ms jbP1.0, scan1 movA, #0 ljmpget_code db_1:lcallwt_10ms jbP1.1, scan2 movA, #1 ljmpget_code ….. … ….. get_code:movDPTR, #key_tab movcA, @A+DPTR ljmpscan key_tab:db‘0123456789ABCDEF’ END
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-16 Simple output devices Case-1 LED is ON if output=zero Most LEDs drop 1.7 volts and need about 10ma Current is (5-1.7)/470 Case-2 Too much current Failure of Port or LED Case-3 Not enough drive (1ma) LED is too dim
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-17 The 7-Segment Display 7 LEDs arranged to form the number 8. By turning on and off (LEDs), different combinations can be produced. useful for displaying the digits 0 through 9, and some characters. a b c f e g d
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-18 The 7-segment Display (Cont.) 7-segment displays come in 2 configurations: Common AnodeCommon Cathode Connect cathode to the output Connect cathode to the output Therefore, the common anode variety would be better for our interfacing needs.
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-19 Interfacing a 7-segment display A resistor will be needed to control the current This leaves two possibilities: Case 2 would be more appropriate Case 1 will produce different brightness depending on the number of LEDs turned on.
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-20 Use of current buffer Interfacing to a DIP switch and 7-segment display Output a ‘1’ to ON a segment We can use 74244 to common cathode 7_seg
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-21 BCD to 7_Seg lookup table mov a,p3 anl a,0fh get_code:movDPTR, #7s_tab movcA, @A+DPRT mov p1,a 7s_tab:db3fh,30h,5bh,4fh,66h db 6dh,7dh,07h,7fh,6fh END a b c f e d f e a b e g d a b c g d b c f g a c f g d a c f e g d a b c a b c f e g d a b c f g d BCDp g f e d c b a 7_seg he x 00000 0 1 1 1 1 1 13f 00010 0 1 1 0 0 0 030 00100 1 0 1 1 0 1 15b 00110 1 0 0 1 1 1 14f 01000 1 1 0 66 01010 1 1 0 1 1 0 16d 01100 1 1 1 1 1 0 17d 01110 0 0 0 0 1 1 107 10000 1 1 1 1 1 1 17f 10010 1 1 0 1 1 1 16f
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-22 LCD Interfacing Liquid Crystal Displays (LCDs) cheap and easy way to display text Various configurations ( 1 line by 20 X char up to 8 lines X 80 ) Integrated controller The display has two register command register data register By RS you can select register Data lines ( DB7-DB0 ) used to transfer data and commands
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-23 Alphanumeric LCD Interfacing Pinout 8 data pins D7:D0 RS: Data or Command Register Select R/W: Read or Write E: Enable (Latch data) RS – Register Select RS = 0 Command Register RS = 1 Data Register R/W = 0 Write, R/W = 1 Read E – Enable Used to latch the data present on the data pins. D0 – D7 Bi-directional data/command pins. Alphanumeric characters are sent in ASCII format. E R/W RS DB7–DB0 LCD controller communications bus Microcontrolle r 8 LCD Module
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-24 LCD Commands The LCD’s internal controller can accept several commands and modify the display accordingly. Such as: Clear screen Return home Decrement/Increment cursor After writing to the LCD, it takes some time for it to complete its internal operations. During this time, it will not accept any new commands or data. We need to insert time delay between any two commands or data sent to LCD
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-25 Pin Description
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-26 Command Codes
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-27 LCD Addressing
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-28 LCD Timing
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-29
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-30 Interfacing LCD with 8051 LM015 8051 P1.7-P1.0 D7-D0 RW RS E P3.4 P3.5 P3.3
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-31 Interfacing LCD with 8051 mov A, command call cmd delay mov A, another_cmd call cmd delay mov A, #’A’ call data delay mov A, #’B’ call data delay …. Command and Data Write Routines data:mov P1, A ;A is ascii data setb P3.3 ;RS=1 data clr P3.4 ;RW=0 for write setb P3.5;H->L pulse on E clr P3.5 ret cmd:mov P1,A ;A has the cmd word clr P3.3 ;RS=0 for cmd clr P3.4 ;RW=0 for write setb P3.5 ;H->L pulse on E clr P3.5 ret
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-32 Example
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hsabaghianb @ kashanu.ac.ir Microprocessors 6-33 8255 Usage: Simple Example 8255 memory mapped to 8051 at address C000H base A = C000H, B = C001H, C = C002H, CR = C003H Control word for all ports as outputs in mode0 CR : 1000 0000b = 80H test: mov A, #80H ; control word mov DPTR, #C003H ; address of CR movx @DPTR, A ; write control word mov A, #55h ; will try to write 55 and AA ; alternatively repeat:mov DPTR,#C000H ; address of PA movx @DPTR, A ; write 55H to PA inc DPTR ; now DPTR points to PB movx @DPTR, A ; write 55H to PB inc DPTR ; now DPTR points to PC movx @DPTR, A ; write 55H to PC cpl A ; toggle A (55 AA, AA 55) acall MY_DELAY ; small delay subroutine sjmp repeat ; for (1)
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