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E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 1 FEE2006 Workshop on.

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Presentation on theme: "E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 1 FEE2006 Workshop on."— Presentation transcript:

1 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 1 FEE2006 Workshop on Front-End electronics Perugia, Italia 18-May-2006 E. N. Spencer SCIPP – UCSC

2 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 2 The ATLAS Strip Detector Readout The present ATLAS strip detector readout IC (named ABCD) is fabricated on the DMILL biCMOS technology. The front-end amplifier, shaper and discriminator is biCMOS. The back-end pipeline, readout, command decoder, etc. is all CMOS devices. The DMILL technology is no longer available and it would likely not be sufficiently rad-hard for the higher SLHC luminosity, at least not at the same radii. A new technology must be chosen.

3 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 3 Deep Sub-micron CMOS a Possibility One obvious possibility is a complete IC in deep sub-micron CMOS. Radiation hardness of 0.25  m CMOS has been demonstrated at levels sufficient for strip use at SLHC Newer 0.13  m technologies are now being evaluated and are likely more rad-hard. A demonstration front-end circuit was designed and fabricated in 0.25  m CMOS a few years ago and was shown to meet present ATLAS noise and timing requirements. A proposal is now being discussed to build a CMOS replacement for the full ABCD chip to demonstrate feasibility and evaluate performance.

4 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 4 Past Experience A biCMOS technology was ideal for the existing ATLAS readout IC because: We have shown for past experiments that the bipolar technology has advantages over CMOS in power and performance for front- end amplification when the capacitive loads are high and the shaping times short. ZEUS-LPSTek-Z IC SSC-SDCLBIC IC ATLAS-SCTABCD, CAFE-M, CAFE-P ICs CMOS is the preferred technology for memory and logic circuits of the back-end. BiCMOS technology afforded both of these optimizations in one IC. Experience with commercial 0.25  m CMOS has shown the advantage of using a volume commercial rather than a niche technology.

5 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 5 Technical Issues The ATLAS-ID upgrade will put even greater constraints on power. Can we meet power and shaping time requirements with deep sub- micron CMOS? Achieving sufficient transconductance of the front-end transistor typically requires large bias currents. The crossing time of the SLHC is not yet fixed. If this dictates a faster shaping time, the transconductance vs. power will become a bigger issue. If past experience still applies, a bipolar front-end may be able to meet noise and timing requirements for less power than a CMOS solution. Are there commercial biCMOS technologies that could meet all of our stringent requirements?

6 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 6 biCMOS with Enhanced SiGe The market for wireless communication has now spawned many biCMOS technologies where the bipolar devices have been enhanced with a germanium doped base region (SiGe devices). We have identified at least the following vendors: IBM (at least 3 generations available) STm IHP, (Frankfurt on Oder, Germany) Motorola JAZZ Advanced versions include CMOS with feature sizes of 0.25  m to 0.13  m. The bipolar devices have DC current gains (  ) of several 100 and f T s up to 200s of GHz. This implies very small geometries that could afford higher current densities and more rad-hardness. Growing number of fab facilities

7 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 7 Technical Questions The changes that make SiGe Bipolar technology operate at 100s of GHz for the wireless industry coincide with the features that enhance performance for our application. Small feature size increases radiation tolerance. Extremely small base resistance (of order 10-100  ) affords low noise designs at very low bias currents. Can these features help save power? Will the SiGe technologies meet rad-hard requirements?

8 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 8 Radiation vs. Radius in Upgraded Tracker The usefulness of a SiGe bipolar front-end circuit will depend upon its radiation hardness for the various regions (i.e. radii) where silicon strip detectors might be used. Inner Pixel Mid-Radius Short Strips Outer-Radius “SCT” Fluence [10 14 n eq /cm 2 ]

9 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 9 Tracker Regions Amenable for SiGe For the inner tracker layers, pixel detectors will be needed, and their small capacitances allow the use of deep sub-micron CMOS as an efficient readout technology. Starting at a radius of about 20 cm, at fluence levels of 10 15 n/cm 2, short strips can be used, with a detector length of about 3 cm and capacitances on the order of 5 pF. At a radius of about 60 cm, the expected fluence is a few times 10 14 n/cm 2, and longer strips of about 10 cm and capacitance of 15 pF can be used. It is in these two outer regions with sensors with larger capacitive loads where bipolar SiGe might be used in the front-end readout ASICs with welcome power savings while still maintaining fast shaping times.

10 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 10 Evaluation of SiGe Radiation Hardness The Team D.E. Dorfan, A. A. Grillo, A. Jones, G.F. Martinez-McKinney, M. Mendoza, P. Mekhedjian, J. Metcalfe, H. F.-W. Sadrozinski, G. Saffier-Ewing, A. Seiden, E. N. Spencer, M. Wilder SCIPP-UCSC Collaborators: A. Sutton, J.D. Cressler, A.P. Gnana Prakash Georgia Tech, Atlanta, GA 30332-0250, USA F. Campabadal, S. Díez, C. Fleta, M. Lozano, G. Pellegrini, J. M. Rafí, M. Ullán CNM (CSIC), Barcelona S. Rescia et al. BNL

11 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 11 J. Kaplon et al., 2004 IEEE Rome Oct 2004, use 0.25  m CMOS For CMOS: Input transistor: 300  A, other transistors 330  A (each 20 – 90  A) Potential CMOS Front-End

12 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 12 High-Rate Front-End Initial Targets for ATLAS-S Input signal polarity: Both, either positive from p-strips or negative from n-strips, polarity switch needed Gain at comparator input, >100 mV/fC. Noise:  <= 1500 e- for unirradiated module.  <=1800 e- for irradiated module. Peaking time: 20 ns, for 25 ns crossing for this study. Upgrade could use 25 ns crossing as at present, but could be 20, 15, or 10 ns, with correspondingly lower analog shaping time. Total time walk for signal at comparator output: < 16 ns, 1.05 fC to 10 fC, for 1 fC threshold Minimum PSRR, 10 kHz-100 kHz: 20 dB, 10 MHz-60 MHz10: -14 dB (Should be improved if feasible). Power: minimum net power dissipation, as other specifications permit, < 400  W for analog section including differential comparator output @ 15 pF detector load. < 160  W @ 6 pF load.

13 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 13 Evaluating SiGe with Design: IHP Submission Depending upon the performance (especially radiation hardness) of the bipolar process, power savings could be realized in both the front transistor and in the other parts of the analog circuit. To evaluate these design questions, UCSC recently submitted for fabrication the High Rate Front –End IC, HRFE, using the IHP SG25H1 SiGe BiCMOS process through the Europractice mini@sic program. IHP SG25H1: 200 GHz f t npn’s, minimum.21 x.84  m npn  is ~150 npn r e is 50  for minimum npn 0.25  m CMOS Available on mini@sic Europractice Full Cadence kit supported by IHP Back annotation of layout is supported

14 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 14 HRFE: BiCMOS Front-End HRFE: BiCMOS Front-End

15 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 15 HRFE Digital LVDS Buffer

16 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 16 Transient Differential Shaper Response 2 fC to 32 fC

17 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 17 Noise versus Detector Capacitance @ 40  A bias for Q1

18 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 18 Noise versus Detector Capacitance @ 150  A bias for Q1

19 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 19 Timewalk: 10 fC as Zero time, 50 attoF drive needed above 1 fC for 16 ns timewalk

20 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 20 Comparator Latching with small Threshold Control Steps through Voltage Threshold Apply 400  A threshold steps: Comparator LVDS output either full width or fully off.

21 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 21 First SiGe High-rate Radiation Testing Radiation testing has been performed on some SiGe devices by our Georgia Tech collaborators up to a fluence of 1x10 14 p/cm 2 and they have demonstrated acceptable performance. (See for example: http://isde.vanderbilt.edu/Content/muri/2005MURI/Cressler_MURI.ppt ) In order to extend this data to higher fluences, we obtained some arrays of test structures from our collaborator at Georgia Tech. These were from a  -enhanced 5HP (called 5AM) process from IBM. (i.e. the  was ~250 rather than ~100.) The parts were tested at UCSC and with the help of RD50 collaborators (Michael Moll & Maurice Glaser) they were irradiated in Fall 2004 at the CERN PS and then re-tested at UCSC. For expediency, all terminals were grounded during the irradiation This gives slightly amplified rad effects compared to normal biasing. Annealing was performed after initial post-rad testing.

22 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 22 Irradiated Samples Pre-rad 1.15 x 10 14 4.15 x 10 13 3.50 x 10 14 1.34 x 10 15 3.58 x 10 15 1.05 x 10 16 ATLAS Upgrade Outer Radius Mid Radius Inner Radius

23 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 23 Radiation Damage Mechanism Ionization Damage (in the spacer oxide layers) The charged nature of the particle creates oxide trapped charges and interface states in the emitter-base spacer increasing the base current. Displacement Damage (in the oxide and bulk) The incident mass of the particle knocks out atoms in the lattice structure shortening hole lifetime, which is inversely proportional to the base current. Radiation damage increases base current causing the gain of the device to degrade. Gain=I c /I b (collector current/base current) I c, I b [A] Forward Gummel Plot for 0.5x2.5  m 2 I c,I b vs. V be Pre-rad and After 1x10 15 p/cm 2 & Anneal Steps V be [V] Base current increases after irradiation Collector current remains the same

24 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 24 Annealing Effects We studied the effects of annealing. The performance improves appreciably. In the case above, the gain is now over 50 at 10  A entering into the region where an efficient chip design may be implemented with this technology. The annealing effects are expected to be sensitive to the biasing conditions. We plan to study this in the future. Current Gain,  I c [A] Annealing of 0.5x2.5  m 2 : Current Gain, , vs. I c Pre-rad and After 1x10 15 p/cm 2 & Anneal Steps Before Irradiation After Irradiation & Full Annealing

25 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 25 Initial Results After irradiation, the gain decreases as the fluence level increases. Performance is still very good at a fluence level of 1x10 15 p/cm 2. A typical I c for transistor operation might be around 10  A where a  of around 50 is required for a chip design. At 3x10 15, operation is still acceptable for certain applications. Current Gain,  Current Gain, , vs. I c for 0.5x10  m 2 Pre-rad and for All Fluences Including Full Annealing I c [A] Before Irradiation Highest Fluence Lowest Fluence Current Gain,  Increasing Fluence

26 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 26 Universality of Results Proton Fluence [p/cm 2 ] 1/  (final) - 1/  (initial)  (1/  ) Post-rad & Anneal to Pre-rad @ J c =10  A Proton Fluence [p/cm 2 ] Ratio of Current Gain,  Post-rad & Anneal to Pre-rad @ J c =10  A Ratio  (final)/  (initial) Universal behavior independent of transistor geometry when compared at the same current density J c. For a given current density  (1/b) scales linearly with the log of the fluence. This precise relation allows the gain after irradiation to be predicted for other length SiGe HBTs. Note there is little dependence on the initial gain value.

27 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 27 5HP Log-Log Plot of I b Radiation Induced Leakage versus I c

28 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 28 Feasibility for ATLAS ID Upgrade Qualifications for a good transistor: A gain of 50 is a good figure of merit for a transistor to use in a front-end circuit design. Low currents translate into increased power savings. At 3.5x10 14 in the outer region (60 cm), where long (10 cm) silicon strip detectors with capacitances around 15pF will be used, the collector current I c is low enough for substantial power savings over CMOS! At 1.34x10 15 closer to the mid radius (20 cm), where short (3 cm) silicon strip detectors with capacitance around 5pF will be used, the collector current I c is still good for a front transistor, which requires a larger current while minimizing noise. We expect better results from 3rd generation IBM SiGe HBTs.

29 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 29 IHP - Another SiGe Vendor CNM has obtained a first set of test structures from IHP and is proceeding with that evaluation. 2 Test chip wafer pieces with ~20 chips 2 Technologies: ­SGC25C (bipolar module equivalent to SG25H1) ­SG25H3 (Alternative technology) Edge effects: ­Test chips came from edge of wafer ­Will be solved in future samples Irradiations with gammas to 10 Mrad and 50 Mrad have been performed. Neutrons and protons to be done.

30 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 30 Preliminary Results for IHP from CNM IHP SGC25C SiGe technology Bipolar transistors equivalent to SG25H1 technology (f T = 200 GHz) No Annealing !

31 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 31 Second IHP Technology IHP SG25H3 SiGe technology f T = 120 GHz, Higher breakdown voltages Annealing after 50 Mrads: 48 hours, very good recovery Very low gains before irradiation (edge wafer transistors)

32 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 32 Continuing Studies of IBM Technologies Neutron irradiation is in progress at Ljubljana. Gammas are being done at BNL now(May 2006) with protons to follow this spring. We are continuing the studies of three IBM technologies (5HP, 7HP and 8HP) using neutrons, gammas and protons. 8HP comes with 0.13  m CMOS 5AM & 5HP comes with 0.25  m & 0.50 mm CMOS

33 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 33 Preliminary! 8HP Beta change with 10 MRad Gamma Irradiation (Biased During Irradiation)

34 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 34 Conclusions on SiGe Evaluation So Far First tests of one SiGe biCMOS process indicate that the bipolar devices may be sufficiently rad-hard for the upgraded ATLAS tracker, certainly in the outer-radius region and even perhaps in the mid-radius region. A design on the IHP SG25 H1 process indicates that such a SiGe front-end circuit will achieve significant power savings. More work is needed to both confirm the radiation hardness and arrive at more accurate estimates of power savings. In particular, with so many potential commercial vendors available, it is important to understand if the post-radiation performance is generic to the SiGe technology or if it is specific to some versions. Other ATLAS Upgrade collaborators are optimizing the minimum analog power achievable with CMOS.

35 E.N. Spencer SCIPP-UCSC 18 May 2006 FEE Perugia Silicon Germanium BICMOS: Irradiation Resistance and Low Power Analog Applications 35 Work Ahead Along with our collaborators, we plan two parallel paths of work. We will complete the irradiation studies of several SiGe processes. In particular, we plan to test at least the IBM 5HP, IBM 7HP, IBM 8HP, IHP SGC25C (eq. to SG25H1), IHP SG25H3 and IHP SGB25VD. CNM will focus on the IHP technologies. UCSC on IBM. To obtain a better handle on the true power savings, we have submitted an IHP 8 channel amplifier/comparator April 2006. This work is in parallel with IHP radiation characterization. UCSC will continue this direct evaluation by design with testing. The BNL LAr Calorimeter group is also engaged in SiGe qualification and is gamma irradiating the IBM SiGe. Once the SiGe evaluation is mature, a choice can be made between SiGe bipolar or CMOS for the front-end to be married with the CMOS backend.


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