1. Ultrasonic signal processing platform for nondestructive evaluation (NDE) Raymond Smith Advisors: Drs. In Soo Ahn, Yufeng Lu May 6, 2014

2. Outline  Motivation  System and Block Diagrams  Design Results  Conclusions 2

3. Motivation 3 Ultrasonic Platform: Requires hardware adaptability Demands high speed performance Handles versatile signal processing techniques

4. 4 Goals Design an ultrasonic signal processing platform with high speed data acquisition Implement the embedded system on a Field Programmable Gate Array(FPGA) Complete design modules for hardware and software for design extension

5. Design and Block Diagrams  System block diagram  Equipment and specifications  Design flow 5

6. System block diagram Digital-to-Analog converter Daughter Board Touchscreen device Analog-to- Digital Converter Ultrasonic flaw detector FPGA Board Touchscreen controller DAC controller ADC controller Embedded System on FPGA Oscilloscope Analog Output 6 Figure 1 System block diagram

7. Equipment and Specifications FPGA Board ( Virtex5) Embedded system with MicroBlaze processor 32-bit scalable and user-configurable microprocessor: Area-optimized, Speed-optimized, Power-optimized or performance-balance option. 7

8. Equipment and Specifications 12 Bit analog-to-digital converter MAX1213N (Up to 170 MSPS) LVDS data port (low-voltage differential signaling) 8 Figure 2 MAX1213N block diagram[1]

9. Equipment and Specifications 9 Figure 3 MAX5874 block diagram [1] 14 Bit digital-to- analog converter MAX5874 Up to 200 MSPS

10. Figure 4 System Setup 10 MAX1536 DC/DC converter 3.3 V  1.8 V

11. LCD touch screen 4.3” 480 x 272 capacitive touch screen Serial communications Displays data Ultrasonic flaw detector Provides analog signal Reference for testing Standalone system 11

12. Design flows 12 Figure 5 Hardware/Software co-design on MicroBlaze [5]

13. 13 Figure 6 Embedded system on MicroBlaze [3] MicroBlaze  32-Bit RISC Core UART A/D Controller D/A Controller Touch Screen Fast Simplex Link 0,1….15 Custom Functions Custom Functions BRAM Local Memory Bus D-Cache BRAM I-Cache BRAM Arbiter PLB Processor Local Bus CacheLink SDRAM Processor Local Bus GPIO Bus Bridge PLB Arbiter On-Chip Peripheral Microblaze-based embedded system on FPGA [3] Daughter boards

14. Results  Digital to Analog Converter (VHDL, Peripheral)  Analog to Digital Converter (VHDL, Peripheral)  Touchscreen Display (C language)  Signal Processing Algorithm (C language) 14

15. Digital to Analog Converter 15 Figure 6 Sawtooth TestFigure 7 Experimental ultrasonic data

16. 16 Analog to Digital Converter Figure 8 ADC interface diagram

17. Figure 9 Differential clock outputs Figure 10 Loopback test 17

18. Figure 11 Chirp frequency sweep (10 KHz to 10MHz) 18

19. 19 Touchscreen display design Figure 12 Sawtooth testFigure 13 Ultrasonic signal display GEMstudio was used for display design Communicate with FPGA through UART (Baud rate: 115200) C language

20. f 2 f 1 fn FFT Target Detection Inverse FFT Experimental data Post-Processing: Algorithm example split spectrum processing (SSP) 20 Inverse FFT Inverse FFT Figure 14 SSP block diagrams[7] Detection results

21. SSP Results Figure 15 Experimental ultrasonic data Figure 16 Signals in different frequency bands 21

22. 22 Figure 18 detection results (C language)Figure 17 detection results (MATLAB)

23. 22 Figure 19 detection results through DAC

24. Conclusions  An ultrasonic signal processing system has been developed for nondestructive evaluation.  ADC and DAC devices have been interfaced with an FPGA  A touchscreen board has been interfaced with an embedded system running on a FPGA.  It can be used as a platform for projects in communication and signal processing 24

25. Resources [1] MAXIM integrated, “MAX1213N/MAX1214N Evaluation Kits” MAX1213N datasheet, 2006. [2] MAXIM integrated, “MAX5873/MAX5874/MAX5875 Evaluation Kits” MAX5874 datasheet, 2006. [3] Xilinx EDK 14.5 design guide and workshop, Xilinx 2014. [4] XILINX “ML505/ML506/ML507 Evaluation Platform: User Guide” XC5VLX110T datasheet, Nov. 2006. [5] Amulet Technologies, “User guide,” STK480272C datasheet, 2013. [6] Xilinx (2011, April 13). EDK Concepts, Tools, and Techniques Available: http://www.xilinx.com/support/documentation/sw_manuals/xilinx13_1/edk_ctt.pdf [7] J. Saniie,, “System-on-Chip Design for Ultrasonic Target Detection Using Split-Spectrum Processing and Neural Networks,” IEEE Trans. Ultrasonics..., vol. 58, no.7, pp. 1354-1368, July, 2011 25

26. Questions? Thank you 26