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Elettronica T AA 2010-2011 Digital Integrated Circuits © Prentice Hall 2003 SRAM & DRAM.

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Presentation on theme: "Elettronica T AA 2010-2011 Digital Integrated Circuits © Prentice Hall 2003 SRAM & DRAM."— Presentation transcript:

1 Elettronica T AA 2010-2011 Digital Integrated Circuits © Prentice Hall 2003 SRAM & DRAM

2 Elettronica T AA 2010-2011 Digital Integrated Circuits © Prentice Hall 2003 SRAM & DRAM Read-Write Memories (RAM)

3 Elettronica T AA 2010-2011 Digital Integrated Circuits © Prentice Hall 2003 SRAM & DRAM 6-transistor CMOS SRAM Cell

4 Elettronica T AA 2010-2011 Digital Integrated Circuits © Prentice Hall 2003 SRAM & DRAM CMOS SRAM Analysis (Write)

5 Elettronica T AA 2010-2011 Digital Integrated Circuits © Prentice Hall 2003 SRAM & DRAM CMOS SRAM Analysis (Read)

6 Elettronica T AA 2010-2011 Digital Integrated Circuits © Prentice Hall 2003 SRAM & DRAM 1-Transistor DRAM Cell

7 Elettronica T AA 2010-2011 Digital Integrated Circuits © Prentice Hall 2003 SRAM & DRAM DRAM Cell Observations

8 Elettronica T AA 2010-2011 Digital Integrated Circuits © Prentice Hall 2003 SRAM & DRAM 1-T DRAM Cell

9 Elettronica T AA 2010-2011 Digital Integrated Circuits © Prentice Hall 2003 SRAM & DRAM Advanced 1T DRAM Cells Cell Plate Si Capacitor Insulator Storage Node Poly 2nd Field Oxide Refilling Poly Si Substrate Trench Cell Stacked-capacitor Cell Capacitor dielectric layer Cell plate Word line Insulating Layer IsolationTransfer gate Storage electrode

10 Elettronica T AA 2010-2011 Digital Integrated Circuits © Prentice Hall 2003 SRAM & DRAM Periphery

11 Elettronica T AA 2010-2011 Digital Integrated Circuits © Prentice Hall 2003 SRAM & DRAM Row Decoders Collection of 2 M complex logic gates Organized in regular and dense fashion (N)AND Decoder NOR Decoder

12 Elettronica T AA 2010-2011 Digital Integrated Circuits © Prentice Hall 2003 SRAM & DRAM Dynamic Decoders

13 Elettronica T AA 2010-2011 Digital Integrated Circuits © Prentice Hall 2003 SRAM & DRAM 4 input pass-transistor based column decoder

14 Elettronica T AA 2010-2011 Digital Integrated Circuits © Prentice Hall 2003 SRAM & DRAM 4-to-1 tree based column decoder

15 Elettronica T AA 2010-2011 Digital Integrated Circuits © Prentice Hall 2003 SRAM & DRAM Sense Amplifiers

16 Elettronica T AA 2010-2011 Digital Integrated Circuits © Prentice Hall 2003 SRAM & DRAM Differential Sensing - SRAM

17 Elettronica T AA 2010-2011 Digital Integrated Circuits © Prentice Hall 2003 SRAM & DRAM Latch-Based Sense Amplifier

18 Elettronica T AA 2010-2011 Digital Integrated Circuits © Prentice Hall 2003 SRAM & DRAM Open bitline architecture

19 Elettronica T AA 2010-2011 Digital Integrated Circuits © Prentice Hall 2003 SRAM & DRAM DRAM Read Process with Dummy Cell

20 Elettronica T AA 2010-2011 Digital Integrated Circuits © Prentice Hall 2003 SRAM & DRAM Open Bit-line Architecture —Cross Coupling

21 Elettronica T AA 2010-2011 Digital Integrated Circuits © Prentice Hall 2003 SRAM & DRAM Alpha-particles

22 Elettronica T AA 2010-2011 Digital Integrated Circuits © Prentice Hall 2003 SRAM & DRAM Yield Yield curves at different stages of process maturity (from [Veendrick92])

23 Elettronica T AA 2010-2011 Digital Integrated Circuits © Prentice Hall 2003 SRAM & DRAM Redundancy

24 Elettronica T AA 2010-2011 Digital Integrated Circuits © Prentice Hall 2003 SRAM & DRAM Redundancy and Error Correction


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