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http://www.eet.bme.hu Budapest University of Technology and Economics Department of Electron Devices Microelectronics, BSc course Field effect transistors 1: The JFET http://www.eet.bme.hu/~poppe/miel/en/11-JFET.pptx
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Budapest University of Technology and Economics Department of Electron Devices 22-10-2014 Microelectronics BSc course, The JFETs © András Poppe & Vladimír Székely, BME-EET 2008-2014 2 The abstraction level of our study: SYSTEM MODULE + GATE CIRCUIT n+ SD G DEVICE V out V in
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Budapest University of Technology and Economics Department of Electron Devices 22-10-2014 Microelectronics BSc course, The JFETs © András Poppe & Vladimír Székely, BME-EET 2008-2014 3 The JFET ► FET = Field Effect Transistor – the flow of charge carriers is influenced by electric field transversal field is used to control Channel JUNCTION FET: depletion layers of pn- junctions close the channel ► Unipolar device: current is conducted by majority carriers ► Power needed for controlling the device 0 Most important parameter: U 0 pinch-off voltage Flow depletion layer
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Budapest University of Technology and Economics Department of Electron Devices 22-10-2014 Microelectronics BSc course, The JFETs © András Poppe & Vladimír Székely, BME-EET 2008-2014 4 The JFET – possible realization: The width of the closed PN junction controls the conductivity of the channel PN junction junction FET depletion layer channel n type epi-layer
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Budapest University of Technology and Economics Department of Electron Devices 22-10-2014 Microelectronics BSc course, The JFETs © András Poppe & Vladimír Székely, BME-EET 2008-2014 5 The JFET – a "normally on" device ► Symbols: ► Characteristics: controlled resistor (see later the triode region of MOSFETs) pinch off voltage n channel p channel no saturation saturation
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Budapest University of Technology and Economics Department of Electron Devices 22-10-2014 Microelectronics BSc course, The JFETs © András Poppe & Vladimír Székely, BME-EET 2008-2014 6 Calculation of the pinch off voltage d h (x) 0 L x S width of depl. layer d geom. width of channel W U(x) Pinch off: d geom. width = 2 x width of depletion layer
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Budapest University of Technology and Economics Department of Electron Devices 22-10-2014 Microelectronics BSc course, The JFETs © András Poppe & Vladimír Székely, BME-EET 2008-2014 7 Problem Determine the pinch off voltage of a Si JFET, if the channel width is d = 4 m and the doping is N d = 10 15 /cm 3 !
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Budapest University of Technology and Economics Department of Electron Devices 22-10-2014 Microelectronics BSc course, The JFETs © András Poppe & Vladimír Székely, BME-EET 2008-2014 8 The characteristic geom. width of channel width of depletion layer
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Budapest University of Technology and Economics Department of Electron Devices 22-10-2014 Microelectronics BSc course, The JFETs © András Poppe & Vladimír Székely, BME-EET 2008-2014 9 The characteristic geom. width of channel width of depletion layer
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Budapest University of Technology and Economics Department of Electron Devices 22-10-2014 Microelectronics BSc course, The JFETs © András Poppe & Vladimír Székely, BME-EET 2008-2014 10 The characteristic Channel conductivity
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Budapest University of Technology and Economics Department of Electron Devices 22-10-2014 Microelectronics BSc course, The JFETs © András Poppe & Vladimír Székely, BME-EET 2008-2014 11 The characteristic Current constant For the triode region!
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Budapest University of Technology and Economics Department of Electron Devices 22-10-2014 Microelectronics BSc course, The JFETs © András Poppe & Vladimír Székely, BME-EET 2008-2014 12 The characteristic For all regions! Only in saturation:
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Budapest University of Technology and Economics Department of Electron Devices 22-10-2014 Microelectronics BSc course, The JFETs © András Poppe & Vladimír Székely, BME-EET 2008-2014 13 Small signal parameters, equivalent Slope / transconductance Output conductance Voltage gain In Out
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