1. Make

2. A simple make file $ make program Strength of make is its sensitivity to dependency hierarchies. Specify such dependencies in a description file called makefile (or Makefile). target program is built of 1 or more files called dependents, recursively.

3. Description file example CC = gcc program : main.o iodat.o dorun.o lo.o /usr/lib/crtn.a ${CC} –o program main.o iodat.o dorun.o lo.o /usr/lib/crtn.a main.o : main.c ${CC} –c main.c iodat.o : iodat.c ${CC} –c iodat.c dorun.o : dorun.c ${CC} –c dorun.c lo.o : lo.s as -o lo.o lo.s delete: rm –f *.o tab Each entry consists of a dependency line (:) and one or more command lines. To the left of the : is the target. To the right are the target dependencies. Command lines begin with a \t character. Command lines show how to build a target. CC is a variable; makes it easier to change the compiler.

4. How make is used: In the directory that contains a makefile execute for any target in a makefile. Or make several targets: The command Makes the first target. $ make $ make target1 target2 target3 $ make

5. How make works: make executes the commands associated with the command line target. But before that it checks a lot. Does a file called program exist and is it newer than any of its dependencies. If so, make exits doing nothing. If, for example, dorun.o is newer than program make essentially processes before it then executes the program entry command. If dorun.o is newer than program make checks dorun.o dependency. dorun.o depends on dorun.c and if dorun.c is newer than dorun.o make essentiallyprocesses before it then executes the program entry command. $ make program $ make dorun

6. Key to make’s usefulness: Ability to decide on its own what things to build.

7. Summary: Building a program means executing a chain of commands. Make traces back through the chain of dependencies and decides what commands must be executed. Make works its way through the chain until finally your command-line target is up to date.

8. 2 nd Example: plot_prompt : basic.o prompt.o cc –o plot_prompt basic.o prompt.o plot_win : basic.o window.o cc –o plot_win basic.o window.o basic.o : basic.c cc –c basic.c prompt.o : prompt.c cc –c prompt.c window.o : window.c cc –c window.c

9. 2 nd Example (cont) $ make plot_prompt cc –o prompt.c cc –o plot_prompt basic.o prompt.o

10. Command line options: Minor part of make. -f description file with non-standard name -n print out all commands to execute but execute none -s execute all but no echoed output -q checks if targets are up-to-date; returns 0 if so; non-zero otherwise -t updates modified date of target (advances target date) -i continue to execute commands even if errors early on -e change precedence order of macro expansion

11. Macros: name = text string # definition $(name) or ${name} # usage DEBUG_FLAG = # none now but can change to –g ${CC} ${DEBUG_FLAG} –o myprog myprog.c

12. Macro examples CC = gcc OBJS = main.o\ iodat.o\ dorun.o\ lo.o program : main.o iodat.o dorun.o lo.o /usr/lib/crtn.a ${CC} –o program ${OBJS} /usr/lib/crtn.a main.o : main.c ${CC} –c main.c iodat.o : iodat.c ${CC} –c iodat.c dorun.o : dorun.c ${CC} –c dorun.c lo.o : lo.s as -o lo.o lo.s delete: rm –f *.o

13. More macros: plot: ${OBJS} ${CC} –o plot ${DEBUG_FLAGS} ${OBJS} mv plot ${RUN_DIR} MY_SRC = ${SRC} ${SHARED_SRC} SHARED_DIR = /opt/public SHARED_SRC = ${SHARED_DIR}/shared.c CFLAGS = # typical macro

14. Macros on the Command Line: DF = # debug turned off myprog: … ${CC} ${DF} myprog.c –o myprog $ make myprog “DF=-g” In this execution of make, the debug flag is set.

15. Macros from the Environment: $ DIR=/usr/proj; export DIR $ make myprog # Makefile Myprog: … cd ${DIR} ${CC} … $ setenv DIR /usr/proj

16. Macro Priorities: Macro defined in Makefile, in environment and on command-line. Precedence, least to greatest: Internal to make Shell variable Internal to Makefile Command-line Precedence, least to greatest with –e option : Internal to make Internal to Makefile Shell variable Command-line

17. Macro String Substitution: SRC = src1.c src2.c src3.c EXECS = ${SRC:.c=} cp ${EXECS} /backup/bin/.

18. Internal macros: @ is the current target ? means all prerequisites newer than current target plot_prompt: basic.o prompt.o ${CC} –o $@ basic.o prompt.o libops : interact.o sched.o gen.o ar r $@ $? $ cc –c sched.c $ make libops

19. Internal Macros (2): $$@ is the current target but only on dependency lines. $@ is the current target but only on command lines. CMDS = cat dd echo dae cc cmp comm ar ld chown docmk : $$@.c CMDS = cat dd echo dae cc cmp comm ar ld chown ${CMDS} : $$@.c$$@.c ${CC} –O $? –o $@ $ make echo # acts like echo: echo.c cc –O echo.c –o echo

20. 1 st makefile revisited C_OBJS = main.o iodat.o dorun.o OBJS = ${C_OBJS} lo.o LIB = /usr/lib/crtn.a program: ${OBJS} ${LIB} ${CC} –o $@ ${OBJS} ${LIB} ${C_OBJS} : $${@:.o=.c}$${@:.o=.c} ${CC} –c $? lo.o : lo.s ${AS} –o $@ $?