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2008-2009 VPEMSY1, D3ECPT2 : ARM Assembler http://www.voti.nl/hvu Hogeschool Utrecht / Electrical Engineering & Design 1 Herhaling B/BL, conditions, STMFD/LDMFD nieuw: indexing instructions nieuw: Half-word and byte memory access LEDjes oefening: Kitt of een ander patroon
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2008-2009 VPEMSY1, D3ECPT2 : ARM Assembler http://www.voti.nl/hvu Hogeschool Utrecht / Electrical Engineering & Design 2 (herhaling) B label R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 = SP R14 = LR R15 = PC registers 0000 0000 0001 0000 0002 0000 0003 0000 0004 0000 0005 0000 0006 0000 0007 0000 0008 0000 0009 ……. FFFF FFFB FFFF FFFC FFFF FFFD FFFF FFFE FFFF geheugen
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2008-2009 VPEMSY1, D3ECPT2 : ARM Assembler http://www.voti.nl/hvu Hogeschool Utrecht / Electrical Engineering & Design 3 (herhaling) BL = branch and link R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 = SP R14 = LR R15 = PC registers 0000 0000 0001 0000 0002 0000 0003 0000 0004 0000 0005 0000 0006 0000 0007 0000 0008 0000 0009 ……. FFFF FFFB FFFF FFFC FFFF FFFD FFFF FFFE FFFF geheugen
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2008-2009 VPEMSY1, D3ECPT2 : ARM Assembler http://www.voti.nl/hvu Hogeschool Utrecht / Electrical Engineering & Design 4 ADDR0, R1, R2; tel op ADDS R0, R1, R2; tel op en zet status ADDEQ R0, R1, R2; doe alleen als ‘EQ’ ADDSEQ R0, R1, R2; combinatie (herhaling)
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2008-2009 VPEMSY1, D3ECPT2 : ARM Assembler http://www.voti.nl/hvu Hogeschool Utrecht / Electrical Engineering & Design 5 (herhaling) assembler instructie formaat : multiple words van en naar geheugen (block transfer instructies) STMFD SP!, { R1-R9, R12 } LDMFD SP!, { R1-R9, R12 }
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2008-2009 VPEMSY1, D3ECPT2 : ARM Assembler http://www.voti.nl/hvu Hogeschool Utrecht / Electrical Engineering & Design 6 LDR R0, [ R1 ] R0 R1000 0004 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 = SP R14 = LR R15 = PC registers 0000 0000 0001 0000 0002 0000 0003 0000 0004 0000 0005 0000 0006 0000 0007 0000 0008 0000 0009 ……. FFFF FFFB FFFF FFFC FFFF FFFD FFFF FFFE FFFF geheugen
![VPEMSY1, D3ECPT2 : ARM Assembler Hogeschool Utrecht / Electrical Engineering & Design 6 LDR R0, [ R1 ] R0 R R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 = SP R14 = LR R15 = PC registers …….](http://images.slideplayer.com./12/4104813/slides/slide_6.jpg "FFFF FFFB FFFF FFFC FFFF FFFD FFFF FFFE FFFF geheugen.")
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2008-2009 VPEMSY1, D3ECPT2 : ARM Assembler http://www.voti.nl/hvu Hogeschool Utrecht / Electrical Engineering & Design 7 Addressing mode: Base Register The memory location to be accessed is held in a base register –STR r0, [r1]; Store contents of r0 to location pointed to ; by contents of r1. –LDR r2, [r1]; Load r2 with contents of memory location ; pointed to by contents of r1. r1 0x200 Base Register Memory 0x5 0x200 r0 0x5 Source Register for STR r2 0x5 Destination Register for LDR
![VPEMSY1, D3ECPT2 : ARM Assembler Hogeschool Utrecht / Electrical Engineering & Design 7 Addressing mode: Base Register The memory location to be accessed is held in a base register –STR r0, [r1]; Store contents of r0 to location pointed to ; by contents of r1.](http://images.slideplayer.com./12/4104813/slides/slide_7.jpg "–LDR r2, [r1]; Load r2 with contents of memory location ; pointed to by contents of r1. r1 0x200 Base Register Memory 0x5 0x200 r0 0x5 Source Register for STR r2 0x5 Destination Register for LDR.")
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2008-2009 VPEMSY1, D3ECPT2 : ARM Assembler http://www.voti.nl/hvu Hogeschool Utrecht / Electrical Engineering & Design 8 Addressing mode: Post-indexed Example: STR r0, [r1], #12 To auto-’increment’ the base register to location 0x1f4 instead use: – STR r0, [r1], #-12 r1 0x200 Original Base Register Memory 0x5 0x200 r0 0x5 Source Register for STR Offset 12 0x20c r1 0x20c Updated Base Register
![VPEMSY1, D3ECPT2 : ARM Assembler Hogeschool Utrecht / Electrical Engineering & Design 8 Addressing mode: Post-indexed Example: STR r0, [r1], #12 To auto-’increment’ the base register to location 0x1f4 instead use: – STR r0, [r1], #-12 r1 0x200 Original Base Register Memory 0x5 0x200 r0 0x5 Source Register for STR Offset 12 0x20c r1 0x20c Updated Base Register](http://images.slideplayer.com./12/4104813/slides/slide_8.jpg "VPEMSY1, D3ECPT2 : ARM Assembler Hogeschool Utrecht / Electrical Engineering & Design 8 Addressing mode: Post-indexed Example: STR r0, [r1], #12 To auto-’increment’ the base register to location 0x1f4 instead use: – STR r0, [r1], #-12 r1 0x200 Original Base Register Memory 0x5 0x200 r0 0x5 Source Register for STR Offset 12 0x20c r1 0x20c Updated Base Register")
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2008-2009 VPEMSY1, D3ECPT2 : ARM Assembler http://www.voti.nl/hvu Hogeschool Utrecht / Electrical Engineering & Design 9 LDR R0, [ R1 ], #4 R0 R1000 0004 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 = SP R14 = LR R15 = PC registers 0000 0000 0001 0000 0002 0000 0003 0000 0004 0000 0005 0000 0006 0000 0007 0000 0008 0000 0009 ……. FFFF FFFB FFFF FFFC FFFF FFFD FFFF FFFE FFFF geheugen + 0000 0008
![VPEMSY1, D3ECPT2 : ARM Assembler Hogeschool Utrecht / Electrical Engineering & Design 9 LDR R0, [ R1 ], #4 R0 R R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 = SP R14 = LR R15 = PC registers …….](http://images.slideplayer.com./12/4104813/slides/slide_9.jpg "FFFF FFFB FFFF FFFC FFFF FFFD FFFF FFFE FFFF geheugen")
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2008-2009 VPEMSY1, D3ECPT2 : ARM Assembler http://www.voti.nl/hvu Hogeschool Utrecht / Electrical Engineering & Design 10 Addressing mode: Pre-indexed Example: STR r0, [r1,#12] To store to location 0x1f4 instead use: STR r0, [r1,#-12] To auto-increment base pointer to 0x20c use: STR r0, [r1, #12]! r1 0x200 Base Register Memory 0x5 0x200 r0 0x5 Source Register for STR Offset 12 0x20c
![VPEMSY1, D3ECPT2 : ARM Assembler Hogeschool Utrecht / Electrical Engineering & Design 10 Addressing mode: Pre-indexed Example: STR r0, [r1,#12] To store to location 0x1f4 instead use: STR r0, [r1,#-12] To auto-increment base pointer to 0x20c use: STR r0, [r1, #12].](http://images.slideplayer.com./12/4104813/slides/slide_10.jpg "r1 0x200 Base Register Memory 0x5 0x200 r0 0x5 Source Register for STR Offset 12 0x20c.")
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2008-2009 VPEMSY1, D3ECPT2 : ARM Assembler http://www.voti.nl/hvu Hogeschool Utrecht / Electrical Engineering & Design 11 LDR R0, [ R1, #4 ] R0 R1000 0004 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 = SP R14 = LR R15 = PC registers 0000 0000 0001 0000 0002 0000 0003 0000 0004 0000 0005 0000 0006 0000 0007 0000 0008 0000 0009 ……. FFFF FFFB FFFF FFFC FFFF FFFD FFFF FFFE FFFF geheugen + 0000 0008
![VPEMSY1, D3ECPT2 : ARM Assembler Hogeschool Utrecht / Electrical Engineering & Design 11 LDR R0, [ R1, #4 ] R0 R R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 = SP R14 = LR R15 = PC registers …….](http://images.slideplayer.com./12/4104813/slides/slide_11.jpg "FFFF FFFB FFFF FFFC FFFF FFFD FFFF FFFE FFFF geheugen")
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2008-2009 VPEMSY1, D3ECPT2 : ARM Assembler http://www.voti.nl/hvu Hogeschool Utrecht / Electrical Engineering & Design 12 LDR R0, [ R1, #4 ] ! R0 R1000 0004 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 = SP R14 = LR R15 = PC registers 0000 0000 0001 0000 0002 0000 0003 0000 0004 0000 0005 0000 0006 0000 0007 0000 0008 0000 0009 ……. FFFF FFFB FFFF FFFC FFFF FFFD FFFF FFFE FFFF geheugen + 0000 0008
![VPEMSY1, D3ECPT2 : ARM Assembler Hogeschool Utrecht / Electrical Engineering & Design 12 LDR R0, [ R1, #4 ] .](http://images.slideplayer.com./12/4104813/slides/slide_12.jpg "R0 R R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 = SP R14 = LR R15 = PC registers ……. FFFF FFFB FFFF FFFC FFFF FFFD FFFF FFFE FFFF geheugen")
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2008-2009 VPEMSY1, D3ECPT2 : ARM Assembler http://www.voti.nl/hvu Hogeschool Utrecht / Electrical Engineering & Design 13 Getallen optellen.global main getal_1 :.word 11 getal_2 :.word 22 getal_3 :.word 33 som :.word 99999 add_r0_r2: stmfdsp!, { lr } add r0, r0, r2 ldmfdsp!, { pc } add1: stmfdsp!, { r2, lr } ldr r2, [ r1 ] bladd_r0_r2 add r1, r1, #4 ldmfdsp!, { r2, pc } main: ldr r0, =0 ldr r1, =getal_1 bladd ldr r1, =som str r0, [ r1] …..
![VPEMSY1, D3ECPT2 : ARM Assembler Hogeschool Utrecht / Electrical Engineering & Design 13 Getallen optellen.global main getal_1 :.word 11 getal_2 :.word 22 getal_3 :.word 33 som :.word add_r0_r2: stmfdsp!, { lr } add r0, r0, r2 ldmfdsp!, { pc } add1: stmfdsp!, { r2, lr } ldr r2, [ r1 ] bladd_r0_r2 add r1, r1, #4 ldmfdsp!, { r2, pc } main: ldr r0, =0 ldr r1, =getal_1 bladd ldr r1, =som str r0, [ r1] …..](http://images.slideplayer.com./12/4104813/slides/slide_13.jpg "VPEMSY1, D3ECPT2 : ARM Assembler Hogeschool Utrecht / Electrical Engineering & Design 13 Getallen optellen.global main getal_1 :.word 11 getal_2 :.word 22 getal_3 :.word 33 som :.word add_r0_r2: stmfdsp!, { lr } add r0, r0, r2 ldmfdsp!, { pc } add1: stmfdsp!, { r2, lr } ldr r2, [ r1 ] bladd_r0_r2 add r1, r1, #4 ldmfdsp!, { r2, pc } main: ldr r0, =0 ldr r1, =getal_1 bladd ldr r1, =som str r0, [ r1] …..")
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2008-2009 VPEMSY1, D3ECPT2 : ARM Assembler http://www.voti.nl/hvu Hogeschool Utrecht / Electrical Engineering & Design 14 Getallen optellen.global main getal_1 :.word 11 getal_2 :.word 22 getal_3 :.word 33 som :.word 99999 add_r0_r2: stmfdsp!, { lr } add r0, r0, r2 ldmfdsp!, { pc } add1: stmfdsp!, { r2, lr } ldr r2, [ r1 ] bladd_r0_r2 add r1, r1, #4 ldmfdsp!, { r2, pc } main: ldr r0, =0 ldr r1, =getal_1 bladd ldr r1, =som str r0, [ r1] …...global main getal_1 :.word 11 getal_2 :.word 22 getal_3 :.word 33 som :.word 99999 add_r0_r2: stmfdsp!, { lr } add r0, r0, r2 ldmfdsp!, { pc } add1: stmfdsp!, { r2, lr } ldr r2, [ r1 ], #4 bladd_r0_r2 ldmfdsp!, { r2, pc } main: ldr r0, =0 ldr r1, =getal_1 bladd ldr r1, =som str r0, [ r1] …..
![VPEMSY1, D3ECPT2 : ARM Assembler Hogeschool Utrecht / Electrical Engineering & Design 14 Getallen optellen.global main getal_1 :.word 11 getal_2 :.word 22 getal_3 :.word 33 som :.word add_r0_r2: stmfdsp!, { lr } add r0, r0, r2 ldmfdsp!, { pc } add1: stmfdsp!, { r2, lr } ldr r2, [ r1 ] bladd_r0_r2 add r1, r1, #4 ldmfdsp!, { r2, pc } main: ldr r0, =0 ldr r1, =getal_1 bladd ldr r1, =som str r0, [ r1] …...global main getal_1 :.word 11 getal_2 :.word 22 getal_3 :.word 33 som :.word add_r0_r2: stmfdsp!, { lr } add r0, r0, r2 ldmfdsp!, { pc } add1: stmfdsp!, { r2, lr } ldr r2, [ r1 ], #4 bladd_r0_r2 ldmfdsp!, { r2, pc } main: ldr r0, =0 ldr r1, =getal_1 bladd ldr r1, =som str r0, [ r1] …..](http://images.slideplayer.com./12/4104813/slides/slide_14.jpg "VPEMSY1, D3ECPT2 : ARM Assembler Hogeschool Utrecht / Electrical Engineering & Design 14 Getallen optellen.global main getal_1 :.word 11 getal_2 :.word 22 getal_3 :.word 33 som :.word add_r0_r2: stmfdsp!, { lr } add r0, r0, r2 ldmfdsp!, { pc } add1: stmfdsp!, { r2, lr } ldr r2, [ r1 ] bladd_r0_r2 add r1, r1, #4 ldmfdsp!, { r2, pc } main: ldr r0, =0 ldr r1, =getal_1 bladd ldr r1, =som str r0, [ r1] …...global main getal_1 :.word 11 getal_2 :.word 22 getal_3 :.word 33 som :.word add_r0_r2: stmfdsp!, { lr } add r0, r0, r2 ldmfdsp!, { pc } add1: stmfdsp!, { r2, lr } ldr r2, [ r1 ], #4 bladd_r0_r2 ldmfdsp!, { r2, pc } main: ldr r0, =0 ldr r1, =getal_1 bladd ldr r1, =som str r0, [ r1] …..")
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2008-2009 VPEMSY1, D3ECPT2 : ARM Assembler http://www.voti.nl/hvu Hogeschool Utrecht / Electrical Engineering & Design 15 Variaties op LDR R0, [ R1 ]: LDR R0, [ R1 ] @ word (32 bit) LDRH R0, [ R1 ] @ half-word (16 bit) LDRB R0, [ R1 ] @ byte (8 bit) - H of B komt achteraan, dus: LDREQB - Let op de alignment van het geheugen adres! - Kan net zo bij STR
![VPEMSY1, D3ECPT2 : ARM Assembler Hogeschool Utrecht / Electrical Engineering & Design 15 Variaties op LDR R0, [ R1 ]: LDR R0, [ R1 word (32 bit) LDRH R0, [ R1 half-word (16 bit) LDRB R0, [ R1 byte (8 bit) - H of B komt achteraan, dus: LDREQB - Let op de alignment van het geheugen adres.](http://images.slideplayer.com./12/4104813/slides/slide_15.jpg "- Kan net zo bij STR.")
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2008-2009 VPEMSY1, D3ECPT2 : ARM Assembler http://www.voti.nl/hvu Hogeschool Utrecht / Electrical Engineering & Design 16 B naam BL naam LDR R0, =value MOV R0, R1 LDR R0, [ R1 ] STR R0, [ R1 ] ADD R0, R1, R2 ADD R0, R1, #15 MOV PC, LR
![VPEMSY1, D3ECPT2 : ARM Assembler Hogeschool Utrecht / Electrical Engineering & Design 16 B naam BL naam LDR R0, =value MOV R0, R1 LDR R0, [ R1 ] STR R0, [ R1 ] ADD R0, R1, R2 ADD R0, R1, #15 MOV PC, LR](http://images.slideplayer.com./12/4104813/slides/slide_16.jpg "VPEMSY1, D3ECPT2 : ARM Assembler Hogeschool Utrecht / Electrical Engineering & Design 16 B naam BL naam LDR R0, =value MOV R0, R1 LDR R0, [ R1 ] STR R0, [ R1 ] ADD R0, R1, R2 ADD R0, R1, #15 MOV PC, LR")
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2008-2009 VPEMSY1, D3ECPT2 : ARM Assembler http://www.voti.nl/hvu Hogeschool Utrecht / Electrical Engineering & Design 17 SUBS R5, R0, #3 MOVEQ R4, R2 LDRB R0, [ R1 ], #4 STRH R0, [ R1, #3 ] LDR R0, [ R1, #4 ]! STMFD SP!, { R1-R3, LR } LDMFD SP!, { R1-R3, PC }
![VPEMSY1, D3ECPT2 : ARM Assembler Hogeschool Utrecht / Electrical Engineering & Design 17 SUBS R5, R0, #3 MOVEQ R4, R2 LDRB R0, [ R1 ], #4 STRH R0, [ R1, #3 ] LDR R0, [ R1, #4 ].](http://images.slideplayer.com./12/4104813/slides/slide_17.jpg "STMFD SP!, { R1-R3, LR } LDMFD SP!, { R1-R3, PC }.")
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2008-2009 VPEMSY1, D3ECPT2 : ARM Assembler http://www.voti.nl/hvu Hogeschool Utrecht / Electrical Engineering & Design 18 ACPS = ARM Procedure Call Standard R0 – R3 : function arguments R0 (soms ook R1, R2, R3) : function result R4 - R8 : local scratch (preserved) R9 : afblijven R10-11 : local scratch (preserved) R13 : SP R14 : LR R15 : PC R0 – R3 are *not* preserved; (boek p175-180)
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2008-2009 VPEMSY1, D3ECPT2 : ARM Assembler http://www.voti.nl/hvu Hogeschool Utrecht / Electrical Engineering & Design 19 LEDs file blink.zip uitpakken naar lege directory (geen spaties in de pathname…) run ‘as is’ laat de LEDs knipperen
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2008-2009 VPEMSY1, D3ECPT2 : ARM Assembler http://www.voti.nl/hvu Hogeschool Utrecht / Electrical Engineering & Design 20 Blink.global main main: @ configureer de hardware om de LEDs te gebruiken blLEDs_init loop: ldr r0, =0x0F blLEDs_write ldrr0, =( 500 * 1000 ) blWAIT_uS ldrr0, =0xF0 blLEDs_write ldrr0, =( 500 * 1000 ) blWAIT_uS b loop
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2008-2009 VPEMSY1, D3ECPT2 : ARM Assembler http://www.voti.nl/hvu Hogeschool Utrecht / Electrical Engineering & Design 21 sluit een bordje aan (USB ‘debug’) installeer de files uit blink.zip in een lege directory let op: geen spaties in de pathname dubbel-klik op de.ppr file build start debugger
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2008-2009 VPEMSY1, D3ECPT2 : ARM Assembler http://www.voti.nl/hvu Hogeschool Utrecht / Electrical Engineering & Design 22 zet onder file > target settings: Target = Remote/TCP Hostname = 127.0.0.1 Port = 8888 (als je netjes afsluit blijft zou dit moeten blijven staan)
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2008-2009 VPEMSY1, D3ECPT2 : ARM Assembler http://www.voti.nl/hvu Hogeschool Utrecht / Electrical Engineering & Design 23 Als je dit krijgt moet je onder control panel > system > hardware > device manager (select view > show hidden devices) > non plug-and- pray devices > MAC_MOT > driver instellen op status = started, type = automatic
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2008-2009 VPEMSY1, D3ECPT2 : ARM Assembler http://www.voti.nl/hvu Hogeschool Utrecht / Electrical Engineering & Design 24 Als je dit krijgt heb je debugger/loader niet afgesloten Als het echt niet werkt: de USB aansluiting er even uithalen om het bordje te resetten.
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2008-2009 VPEMSY1, D3ECPT2 : ARM Assembler http://www.voti.nl/hvu Hogeschool Utrecht / Electrical Engineering & Design 25 Voor als het even echt niet meer werkt: als je de debugger hebt afgesloten moeten al die DOS schermen ook weg zijn (evt met de hand sluiten) De editor sluiten en weer opstarten de USB kabel er even uithalen om het bordje te resetten, USB weer aansluiten. PC uitzetten en weer aanzetten
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2008-2009 VPEMSY1, D3ECPT2 : ARM Assembler http://www.voti.nl/hvu Hogeschool Utrecht / Electrical Engineering & Design 26 Doen 1 Run het bestaande programma (dit hoef ik niet af te tekenen). Laat de LEDs anders knipperen: iedere 2 seconden even (bv 200ms) aan (wel aftekenen).
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2008-2009 VPEMSY1, D3ECPT2 : ARM Assembler http://www.voti.nl/hvu Hogeschool Utrecht / Electrical Engineering & Design 27 Doen 2 Laat de LEDs ‘kitt’-style heen-en-weer aan gaan. Doe dit door –Alle stappen van dit patroon in het geheugen op te slaan met.byte –Een subroutine show te schrijven (conform de APCS) die het hele patroon (alle stapen) 1 keer laat zien.
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2008-2009 VPEMSY1, D3ECPT2 : ARM Assembler http://www.voti.nl/hvu Hogeschool Utrecht / Electrical Engineering & Design 28 Pseudo Instructions:.byte,.align.global main aantal :.word 5 patroon :.byte 0x01, 0x03, 0x07, 0x0F, 0x1F.align main: again: ldr r0, =aantal; aantal bytes in patroon ldr r1, =patroon; pointer naar de bytes ldr r2, =100 * 1000; wachttijd blshow bagain show:
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