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ECFA-DESY meeting, Krakow, 16 th September 2001Václav Vrba, Institute of Physics, AS CR 1 Václav Vrba Institute of Physics AS CR, Prague Silicon pad sensors for WSiCal
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ECFA-DESY meeting, Krakow, 16 th September 2001Václav Vrba, Institute of Physics, AS CR 2 Outline Si wafer basic layout GDS file Pre-prototyping
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ECFA-DESY meeting, Krakow, 16 th September 2001Václav Vrba, Institute of Physics, AS CR 3 Si wafer layout 0.5 mm
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ECFA-DESY meeting, Krakow, 16 th September 2001Václav Vrba, Institute of Physics, AS CR 4 To be done: Define contacts to diodes; Define test structures – number of them are ready in sketches, but should be discussed; Technical finalization of design (corner rounding, discus design rules with vendors, etc.) Etc.
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ECFA-DESY meeting, Krakow, 16 th September 2001Václav Vrba, Institute of Physics, AS CR 5 Pre-prototyping Active area cca 0.3 cm 2 Active area cca 10 cm 2 Wafer diameter: 100 mm Thickness: 250 um Wafer backside all Al metallized
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ECFA-DESY meeting, Krakow, 16 th September 2001Václav Vrba, Institute of Physics, AS CR 6 Electric characterization
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ECFA-DESY meeting, Krakow, 16 th September 2001Václav Vrba, Institute of Physics, AS CR 7 Electric characterization (cont)
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ECFA-DESY meeting, Krakow, 16 th September 2001Václav Vrba, Institute of Physics, AS CR 8 Conclusions The design of the silicon pad array is on the way; some adjustments and more detailed discussions are needed; The design could be ready for submission in approximately one month; the sensors delivery should be discussed with vendors; “Pre-prototype” probes give encouraging results: - leakage current is well below 20 nA/cm 2 - for 500 um thick wafers one can expect V depl around 280V, and the operational voltage V op can be around 320 V; this is well below the measured break down voltages; “Pre-prototype” probes already meet technical specifications.
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