1. Gérard: The Hard Man behind the Soft Core Satnam Singh Microsoft Research, Cambridge UK The University of Birmingham

3. !

5. multiple independent multi-ported memories fine-grain parallelism and pipelining hard and soft embedded processors

10. 0101110001110001 1101001110011001 0011100011100101 0110001110001110 New.bit File 0101110001110001 1101001110011001 0011100011100101 0110001110001110.mem File DATA2BRAM 0101110001110001 1101001110011001 0011100011100101 0110001110001110 ELF File # CPU address space 0xFFFFE000 - 0xFFFFFFFF. ADDRESS_BLOCK dramctlr BUS_BLOCK [0xFFFFF000:0xFFFFFFFF] xrefdes/dramctlr/bram0 [7:0] LOC=RAMB16_X0Y0; xrefdes/dramctlr/bram1 [15:8] LOC=RAMB16_X1Y0; xrefdes/dramctlr/bram2 [23:16] LOC=RAMB16_X2Y0;... END_BUS_BLOCK; END_ADDRESS_BLOCK; BlockRam Memory Map (.bmm) 0101110001110001 1101001110011001 0011100011100101 0110001110001110.bit File

11. ZBT SSRAM SDRAM ZBT SSRAM Controller SDRAM Controller 405 PPC On-Chip Peripheral ROM High-Speed Peripheral On-Chip Peripheral CoreConnect OPB (On-Chip Peripheral Bus) OPB DDR SDRAM CoreConnect Processor Local Bus (PLB) Arbiter DDR SDRAM Controller External Bus Controller OPB Bridge I-Cache PLB D-Cache PLB

12. locks monitors condition variables spin locks priority inversion

14. PLDI 1998

15. PLDI 1999

16. PLDI 2000

17. POPL 1998

18. POPL 1999

19. POPL 2000

20. ray of light Signal Lustre PRET-C SHIM Jazz Esterel

21. San Jose, 6 June 2003

22. Sylvan Dissoubray

23. Gérard wearing Satnam’s ring Satnam wearing Gérard’s ring San Jose, 6 June 2003

24. Gérard Berry Synchronous Programming Language Combat Team Albert Benveniste Nicolas Halbwachs

25. Zero delay example: Newtonian Mechanics Concurrency + Determinism Calculations are feasible

26. Predictable delay examples: sound, light, waves Wait long enough, same result as 0-delay ! Zero delay and predictable delay are fully compatible Constructive semantics is the unification A theory of causality for reactive systems Clocked digital circuits paradigm

27. Safe State Machines Esterel code loop [ await A || await B ] ; emit O each R

28. Esterel design void uart_device_driver () {..... } uart.c VHDL, Verilog -> hardware implementation C -> software implementation

29. Hardware UART

30. Software UART

31. 18/01/2011 31G. Berry, Microsoft Research Project Structure Automatic Documentation Project Management Executable Specification Exporter Debugging & Simulation Formal Verification Design Verification Sequential Equivalence check DUT  Optimized for synthesis DFT-ready SystemC & RTL flow integration C / C++ / SystemCVerilog / VHDL.sc.vhd Architecture Design Specification Capture Design Functional Spec Verification Requirements Architecture Diagram (2007) Editor Simulator Design Verifier Model Reporter Code & Testbench Generators Editor Sequential Equivalence Checker IDE Player IDE

32. 18/01/2011 32G. Berry, Microsoft Research SCADE in the Airbus A380 –Flight Control system –Flight Warning system –Electrical Load Management system –Anti Icing system –Braking and Steering system –Cockpit Display system –Part of ATSU (Board / Ground comms) –FADEC (Engine Control) –EIS2 : Specification GUI Cockpit: –PFD : Primary Flight Display –ND : Navigation Display –EWD : Engine Warning Display –SD : System Display Flight Control Primary & Secondary Commands Anti Ice Control Unit Flight Warning System Braking & Steering Control Unit

34. French Synchronous Language Thread Level Remains High SEVERE: hysteresis HIGH: deadlock ELEVATED: priority inversion GUARDED: non-atomic action LOW: race condition

35. begin … end procedure static final void for while loop accept if then else case

36. present gift then await scream end present Thank you Stephen Edwards

37. present gift then pause; every day do await thanks end every end present Thank you Stephen Edwards

38. abort nothing when bored Thank you Stephen Edwards

39. every day do nothing end every Thank you Stephen Edwards

40. run slowly Thank you Stephen Edwards

41. await falls ; every body do sustain disbelief end every Thank you Stephen Edwards

42. present case legally do run away end present Thank you Stephen Edwards

43. abort task when immediate objection Thank you Jens Brandt

44. abort run slowly || run fastly when sleepy Thank you Mike Kishinevsky

45. trap mouse in every loop do run cheese end every handle hair do run water end trap Thank you Mike Kishinevsky

46. Engine control software programmed in Esterel by non-French speaker

47. Kavi Arya, Mumbai, 10 January 2004

50. Esterel present A then emit A end

51. QEsterel present A then emit A end Thank you Georges Gonthier

52. Mike Kishinevsky