1. Design Flow Enhancements for DNA Arrays Andrew B. Kahng 1 Ion I. Mandoiu 2 Sherief Reda 1 Xu Xu 1 Alex Zelikovsky 3 (1) CSE Department, University of California at San Diego (2) CSE Department, University of Connecticut (3) CS Department, Georgia State University

2. Introduction to DNA microarrays and manufacturing challenges Outline DNA microarray design flow DNA microarray design flow enhancements: Integration of Probe Placement and Embedding Integration of Probe Selection and Physical Design Conclusions and future research directions

3. Uses of DNA arrays Introduction to DNA microarrays Practical experiment using DNA arrays DNA manufacturing process Problems and challenges in DNA manufacturing process

4. Introduction to DNA Probe Arrays DNA Arrays (Gene Chips) used in wide range of genomic analyses gene expression detection drug discovery mutation detection Diverse fields from health care to environmental sciences DNA Arrays are composed of probes where each probe is a sequence of 25 nucleotides

5. Images courtesy of Affymetrix. Tagged RNA fragments flushed over array Laser activation of fluorescent tags Optical scanning of hybridization intensities DNA Array Hybridization Experiment

6. DNA Array Manufacturing Process Very Large-Scale Immobilized Polymer Synthesis (VLSIPS) Treat substrate with chemically protected linker molecules Selectively expose array sites to light Flush chip’s surface with solution of protected A, C, G, T Repeat last two steps until desired probes are synthesized

7. Probe Synthesis array probes A 3×3 array CGACACG ACAC ACGAGAG CG AGAGC Nucleotide Deposition Sequence ACG A  Mask 1 A A A A A

8. Probe Synthesis array probes A 3×3 array CGCGACACG ACAC ACGACGAGAG CGCG AGAGC Nucleotide Deposition Sequence ACG C  Mask 2 C C C C C C A A A A A

9. Probe Synthesis array probes A 3×3 array CGCGACG ACGAGAG CGCG AGAGC Nucleotide Deposition Sequence ACG G  Mask 3 C C C C C C A A A A A G GG G G G A Nucleotide Deposition Sequence defines the order of nucleotide deposition A Probe Embedding specifies the steps it uses in the nucleotide sequence to get synthesized

10. VLSIPS Manufacturing Challenges Lamp Mask Array Problem: Diffraction, internal reflection, scattering, internal illumination Occurs at sites near to intentionally exposed sites Reduce interference  Increase yield  Reduce cost Design objective: Minimize the border length

11. Unwanted Illumination and Border Cost array probes A 3×3 array CGACG ACGAG CG AGC Nucleotide Deposition Sequence ACG A  Mask 1 A A A A A Border = 8 Border Reduction  Unwanted illumination  Chip’s yield

12. Introduction to DNA arrays manufacturing challenges Outline DNA array design flow DNA array design flow enhancements: Integration of Probe Placement and Embedding Integration of Probe Selection and Physical Design Conclusions

13. Previous Work Border minimization was first introduced by Feldman and Pevzner. “Gray Code masks for sequencing by hybridization,” Genomics, 1994, pp. 233-235 Work by Hannenhalli et al. gave heuristics for the placement problem by using a TSP formulation. Kahng et al. “Border length minimization in DNA Array Design,” WABI02, suggested constructive methods for placement and embedding Kahng et al. “Engineering a Scalable Placement Heuristic for DNA Probe Arrays,” RECOMB03, suggested scalable placement improvement and embedding techniques

14. Basic DNA Array Design Flow Probe Selection Design of Test Probes Probe Placement Probe Embedding DNA Array Logic Synthesis BIST and DFT Placement Routing VLSI Chip Physical Design Probe Placement Probe Embedding Probe Selection Design of Test Probes Logic Synthesis BIST and DFT Physic al Design Routing Placement Analogy

15. Design Flow Outline Physical Design  Degrees of freedom (DOF) in probe embedding  DOF exploitation for border conflict reduction Probe Embedding Probe Placement  Similar probes should be placed close together  Constructive placement  Placement improvement operators

16. Key DOF: Probe Embedding (Alignment) A A A C C C G G G T T T Deposition Sequence C T G Hypothetical Probe Group C G T Synchronous Embedding C T G As Soon As Possible (ASAP) Embedding C G T Another Embedding

17. Embedding Determines Border Conflicts A A A C C C T T T G G G A C T G A G T G T G A A Synchronous Embedding A G T A G G T A Deposition Sequence Probes G A A G T A G T ASAP Embedding G

18. Optimal Probe Embedding T A A G A G T A C A T G Before optimal re-embedding A T A A G G T A C A T G After optimal re-embedding A Using Dynamic Programming to optimally re- embed a probe Problem: Optimally embedding a probe with respect to its neighbors Kahng et al. “Border Length Minimization in DNA Array Design,” WABI02 A A A A A A

19. Placement Polishing Using Re-Embedding Use optimal re-embedding algorithm to re-embed each probe with respect to its neighbors

20. Placement Objective: Minimize Border Radix-sort the probes in lexicographical order Probe 1 Probe 2 Probe 3 Probe 4 Probe 5 TATTATAAA A CA GGCC CGGG 12325 TATT ATAA A A CA GGCC CGGG 123 Problem: How to place the 1-D ordering of probes onto the 2-D chip? Radix-sorting the probes order reduces discrepancies between adjacent probes

21. Placement By Threading 12325 TATTATAAA A CA GGCC CGGG Probe 1 Probe 2 Probe 3 Probe 4 Probe 5 Thread on the chip 1 2 3 4 5

22. Row-Epitaxial Placement Improvement Array of size 4 × 4 For each site position (i, j): From within the next k rows, find the best probe to place in (i, j) Move the best probe to (i, j) and lock it in this position Row placement = sort + thread + row epitaxial

23. Introduction to DNA arrays manufacturing challenges Outline DNA array design flow DNA array design flow enhancements: Integration of Probe Placement and Embedding Integration of Probe Selection and Physical Design Conclusions

24. DNA array design flow enhancements Integration of Probe Placement and Embedding Integration of Probe Selection and Physical Design  Initial embeddings influence the placement results  Propose and implement two flows  Probe pools add additional degrees of freedom  Integrate probe selection into physical design  Propose and implement two flows incorporating probe pools Physical Design Probe Selection Design of Test Probes Probe Placement Probe Embedding DNA Array

25. Integration of Probe Placement and Embedding Probe Selection Design of Test Probes Probe Placement Probe Embedding DNA Array Integrating placement and probe embedding gives a further reduction in border conflicts. Probe Placement Probe Embedding Analogous to tighter integration between placement and routing in VLSI physical design

26. Integration of Probe Placement and Embedding 1. Synchronous initial embedding 3. Re-embedding using DP 2. Row placement Flow A Row Epitaxial Re-embedding ASAP initial embedding 1. As Soon As Possible (ASAP) initial embedding 3. Re-embedding using DP 2. Row placement Flow B Chip size Conflicts 6%

27. Placement + Embedding Runtimes Row Epitaxial Re-embedding Chip size CPU (s) 1. Synchronous initial embedding 3. Re-embedding using DP 2. Row placement Flow A Row Epitaxial Re-embedding ASAP initial embedding 1. As Soon As Possible (ASAP) initial embedding 3. Re-embedding using DP 2. Row placement Flow B

28. Second Enhancement: Probe Pools Probe Selection Design of Test Probes Probe Placement Probe Embedding DNA Array Physical Design Problem: Given a probe pool for every target sequence, select a probe for every target sequence such that the total conflict after placement and alignment is minimum. Probe 1Probe 2Probe 3Probe 4 Gene Target Sequence Probe Pool – Pool Size = 4

29. Integrating Probe Selection and Physical Design 1. Perform ASAP embedding of all probe candidates 3. Re-embedding 2. Run row placement selecting the probe from the pool that gives the minimum conflict Flow A ASAP initial embedding 1. Perform ASAP embedding of all probe candidates 3. Run row placement using the selected candidates 2. From each probe pool select the probe that fits in the least number of steps using ASAP Flow B 4. Re-embedding

30. Results (Conflicts) of Probe Pools Chip size = 100 Pool Size Conflicts Chip size = 300 Pool Size Conflicts Chip size = 500 Pool Size Conflicts Chip size = 200 Pool Size Conflicts

31. Comparison of Probe Pools Flows Chip size = 100 Pool Size Conflicts Chip size = 300 Pool Size Conflicts Chip size = 500 Pool Size Conflicts Chip size = 200 Pool Size Conflicts

32. Results (runtime) of Probe Pools Chip size = 100 Pool Size CPU (1000s) Chip size = 300 Pool Size CPU (1000s) Chip size = 500 Pool Size CPU (1000s) Chip size = 200 Pool Size CPU (1000s)

33. Interpretation and Summary of Experimental Data Initial ASAP embeddings produce a decent reduction in border conflicts. Probe pools offer an extra degree of freedom exploited to further reduce border conflicts Integration of placement and embedding yield up to 6% improvement Probe pools add an extra 12-13% improvement Total improvement up to 18% compared to results published in the literature

34. Open Research Directions Probe selection should incorporate ability to uniquely detect target sequences present in sample. This should be done with no ambiguity. Methods similar to Boolean covering and test diagnosis can be used. P1P1 P2P2 P3P3 P4P4 P5P5 T1T1 T2T2 T3T3 T4T4 Each target sequence should have a unique signature Probes Target Sequences

35. Open Research Directions Stronger placement operators leading to further reduction in the border cost. Insertion of probe test can benefit from test and diagnosis topics for VLSI circuits. Future work also covers next generation chips 10k × 10k

36. Conclusions We presented a DNA design flow benefiting from experiences of the VLSI design flow We introduced feedback loops and integrated a number of steps for further reduction in the border cost and hence unwanted illumination We examined the effects of probe selection on both placement and embedding We examined the embedding options and placement on the total border cost

37. Thanks for your attention