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Lecture 20 ANNOUNCEMENTS OUTLINE Review of MOSFET Amplifiers

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1 Lecture 20 ANNOUNCEMENTS OUTLINE Review of MOSFET Amplifiers
HW#11 is due in 2 weeks, on 11/20. Review session: Fri. 11/9, 3-5PM in 306 Soda (HP Auditorium) Midterm #2 (Thursday 11/15 in Sibley Auditorium): Material of Lectures (HW# 7-10; Chapters 6,9,11) 4 pgs of notes (double-sided, 8.5”×11”), calculator allowed OUTLINE Review of MOSFET Amplifiers MOSFET Cascode Stage MOSFET Current Mirror Reading: Chapter 9

2 Review: MOSFET Amplifier Design
A MOSFET amplifier circuit should be designed to ensure that the MOSFET operates in the saturation region, allow the desired level of DC current to flow, and couple to a small-signal input source and to an output “load”. Proper “DC biasing” is required! (DC analysis using large-signal MOSFET model) Key amplifier parameters: (AC analysis using small-signal MOSFET model) Voltage gain Av  vout/vin Input resistance Rin  resistance seen between the input node and ground (with output terminal floating) Output resistance Rout  resistance seen between the output node and ground (with input terminal grounded)

3 MOSFET Models The large-signal model is used to determine the DC operating point (VGS, VDS, ID) of the MOSFET. The small-signal model is used to determine how the output responds to an input signal.

4 Comparison of Amplifier Topologies
Common Source Large Av < 0 - degraded by RS Large Rin determined by biasing circuitry Rout  RD ro decreases Av & Rout but impedance seen looking into the drain can be “boosted” by source degeneration Common Gate Large Av > 0 -degraded by RS Small Rin - decreased by RS Rout  RD ro decreases Av & Rout but impedance seen looking into the drain can be “boosted” by source degeneration Source Follower 0 < Av ≤ 1 Large Rin determined by biasing circuitry Small Rout - decreased by RS ro decreases Av & Rout

5 Common Source Stage

6 Common Gate Stage

7 Source Follower

8 CS Stage Example 1 M1 is the amplifying device; M2 and M3 serve as the load. Equivalent circuit for small-signal analysis, showing resistances connected to the drain

9 Equivalent circuit for small-signal analysis
CS Stage Example 2 M1 is the amplifying device; M3 serves as a source (degeneration) resistance; M2 serves as the load. Equivalent circuit for small-signal analysis

10 Common source amplifier
CS Stage vs. CG Stage With the input signal applied at different locations, these circuits behave differently, although they are identical in other aspects. Common source amplifier Common gate amplifier

11 Composite Stage Example 1
By replacing M1 and the current source with a Thevenin equivalent circuit, and recognizing the right side as a CG stage, the voltage gain can be easily obtained.

12 Composite Stage Example 2
This example shows that by probing different nodes in a circuit, different output signals can be obtained. Vout1 is a result of M1 acting as a source follower, whereas Vout2 is a result of M1 acting as a CS stage with degeneration. For vout2, the denominator has an extra 1/gm1

13 NMOS Cascode Stage Unlike a BJT cascode, the output impedance is not limited by .

14 PMOS Cascode Stage

15 Short-Circuit Transconductance
The short-circuit transconductance is a measure of the strength of a circuit in converting an input voltage signal into an output current signal: The voltage gain of a linear circuit is (Rout is the output resistance of the circuit)

16 Transconductance Example

17 MOS Cascode Amplifier

18 PMOS Cascode Current Source as Load
A large load impedance can be achieved by using a PMOS cascode current source.

19 MOS Current Mirror The motivation behind a current mirror is to duplicate a (scaled version of the) “golden current” to other locations. Current mirror concept Generation of required VGS Current Mirror Circuitry

20 MOS Current Mirror – NOT!
This is not a current mirror, because the relationship between VX and IREF is not clearly defined. The only way to clearly define VX with IREF is to use a diode-connected MOS since it provides square-law I-V relationship.

21 Example: Current Scaling
MOS current mirrors can be used to scale IREF up or down I1 = 0.2mA; I2 = 0.5mA

22 Impact of Channel-Length Modulation

23 CMOS Current Mirror

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