1. Carnegie Mellon A System Design And Build Course On Wearable Computers Dan Siewiorek and Asim Smailagic Carnegie Mellon University MSE ‘01, Las Vegas, June 2001

2. Carnegie Mellon Overview 1.Introduction 2.Approach 3.Electronic Design in a Multidisciplinary Project 4.Design Methodology 5.Power Measurements 6.Evaluation 7.Conclusions

3. Carnegie Mellon Introduction A System - Level design approach to the power and performance of CMU’s wearable computers dedicated to speech processing - the Speech Translator Smart Modules Power consumption has to be considered in all phases of system design

4. Carnegie Mellon Introduction We examine the impact of processor speed, memory size, and type of secondary storage on power consumption and performance We see ahead a world of near-zero energy / weight / cost mobile systems

5. Carnegie Mellon Approach Experimental framework includes a family of CMU wearable computers dedicated to speech processing - Smart Modules They perform speech recognition, language translation, and speech synthesis

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7. Multidisciplinary Project Five major factors in a portable electronic system include: Functionality User Interface Physical Form Factor Power Sensors

8. Carnegie Mellon Multidisciplinary Project Decisions made in one design discipline affect decisions in another discipline The impact can be measured if the cost of the design decision can be reduced to a common “currency” In mobile electronic systems that “currency” is power consumption

9. Carnegie Mellon Major Factors in Portable Electronic Systems and their Relationship to the Design Disciplines

10. Carnegie Mellon Smart Module Architecture The core of the smart module is the Cardio processor card, combining the processor and motherboard chips The Cardio also supports two serial ports for communication between the modules and a VGA interface

11. Carnegie Mellon Smart Module Hardware Diagram CARDIO -Processor -Memory -Chipsets Keyboard Mouse VGA PCMCIA HD ESS 1888 IDEISA Serial Ports Communications To other Modules (For debugging only)

12. Carnegie Mellon Smart Module Functional Prototype

13. Carnegie Mellon Optimized Smart Module

14. Carnegie Mellon Approach The code was profiled and tuned Profiling identified “hot spots” for HW and SW acceleration, and places to reduce computation and storage requirements

15. Carnegie Mellon Power Measurements Power is consumed by Processor Memory Disk Sound Chip Serial Ports

16. Carnegie Mellon Power Measurements The power and performance measurements were taken using a body of 10 English test sentences for the Speech Recognizer and Language Translator, and their 10 Croatian translations for the Speech Synthesizer

17. Carnegie Mellon Power Measurements A power profile for the Smart Modules included: Idle Mode: processor is at nearly 0% usage Full On Mode: processor is at nearly 100% usage Each state transition has an associated latency value

18. Carnegie Mellon Power Measurements States for spinning disk drive: Power Down Mode: power to the disk drive is shut off - when the module is in Suspend Mode High Spin Mode: disk drive is being accessed Low Spin Mode: power-saving mode

19. Carnegie Mellon Power Measurements State diagrams for both processor and disk were combined to produce a new model for power consumption

20. Carnegie Mellon New Model of Power Consumption Over Time Power (W) Time Suspend Idle & High Spin Full on & High Spin Idle & Low Spin Full On & Low Spin

21. Carnegie Mellon Power Consumption Profile Power consumption of the Speech Recognizer module over time, using the 586-based Cardio and a spinning disk drive, was measured

22. Carnegie Mellon Power Consumption of Speech Recognition Module Over Time Suspend Spin Up Full Spin Spin Down Spin Up Spin Down Close TCP Link & Spin Up

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24. Performance Comparison The metric for comparison is proportional to the processing power, and inversely proportional to the product of volume, weight and power consumption

25. Carnegie Mellon NameSpecInt Volume (in 3 ) Weight (lbs)Power (watts)R (V*W*P)Log of Normalized TI 6030175.00260.007.5036.0070200.000.00 TIA-P55.0088.003.006.501716.001.11 TIA-O55.0045.002.504.50506.251.64 SR-SM175.0045.002.134.00382.502.26 OPT-SM175.0033.001.504.00198.002.55 Performance Values for Wearable Computers

26. Carnegie Mellon Composite Performance of Speech Recognition Wearable Computers 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0123456 Evolution of Systems Norm Log [perf/(vol*wt*power)] Normalized Performance Goal: 2.8

27. Carnegie Mellon Spot: SA-1110 Based Wearable Computer New wearable computer as a research platform, including context aware computing Low power design 233 MHz StrongARM 1110 256 MB DRAM Mobile, throttleable platform that can trade performance for energy

28. Carnegie Mellon Spot Specifications

29. Carnegie Mellon Spot Wearable Computer

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31. Carnegie Mellon Conclusions Results show that there are orders of magnitude improvement from one generation of wearable computers to the next A system-level approach to power / performance optimization improved the metric by over a factor of 300 through the four generations, and over 400 through the five generations

32. Carnegie Mellon Conclusions Peak demand by an application can often determine the battery life rather than average demand Audio-centric interfaces exhibit high demand “spikes,” potentially causing significantly reduced battery life

33. Carnegie Mellon Summary The options for the design space included: –Two processor architectures (Intel 486,586) –Three different processor speeds –Two different main memory sizes –Two different secondary storage types The best configuration for performance is the 586/100/32 Flash, and the 486/75/16 Flash for power

34. Carnegie Mellon Power Consumption of Speech Recognition Module Our research indicates that the peak demand of an application can often determine the battery life rather than the average demand Audio-centric interfaces exhibit high demand spikes By filling in the valleys, it would be possible to cut the peak demand in half and thus significantly extend battery life