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1 OS Driven Core Selection for HCMP Systems Anand Bhatia, Rishkul Kulkarni
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Outcomes O Characterization – based on static parameters - Comparison – Heterogeneity aware vs oblivious scheduler O A functional core selector – OSDCS Module X Study of performance change O : Complete - : Partial X : Pending 2
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Prior Work Efficient program scheduling for heterogeneous multi-core processors – J. Chen, L.K. John –Static Characteristics –Euclidean distance based signature matching HASS: A scheduler for Heterogeneous Multicore Systems - Shelepov, D., Fedorova et. al. –DVFS scaling –Process differences A Unified View of Core Selection and Application Steering in Heterogeneous Chip Multiprocessors – Sandeep Navada –Bottleneck counters –Execution migration 3
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4 Phase 1 - Characterization Signature Generation –Static Measurements Dependence Distance (Issue Width) Stack Distance (Cache Size) Branch Variability (Branch Predictor Size) Instructions Per Branch (Experimental) –Projection Functions Core Exploration
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Phase 1 - Results Parameter\CoreABCD Issue Width2448 Branch Predictor Size 1K2K 4K Data Cache Size4Kb8Kb16Kb32Kb Active List Size64128 256 ABCD GCC0.470.490.501.19 GO0.650.960.981.21 PARSER0.630.870.941.04 TWOLF0.510.560.580.46 VORTEX0.540.51 0.36 BZIP0.901.61 1.49 Representative Core Configs -Issue width | Dependence distance -BP Size | Branch variability -D$ Size | Stack Distance -AL Size | IPB IPC on chosen core configs -Independent runs -Useful to determine workload mix for scheduler
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Phase 2 – OSDCS Module Design Considerations –Design choices –Job Monitoring mechanisms Vs Fig. : Experimental setup used for ODCS Interface Module Issue Unit Selecto r Job Queue 721sim 2 Selector LKM 721sim 3 721sim 1 721sim 4 User space Kernel space Simulated Superscaler chip 721sim 2 721sim 3 721sim 1 721sim 4 Actual system call handler Job Queue Fake System call handler Fig : Booting OS on 721sim Cores
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Phase 2 – OSDCS Module - 2 Design detailed. User selector Selector LKM Scheduling Policies. Fig. : Experimental setup used for ODCS Interface Module Issue Unit Selector Job Queue 721sim 2 Selector LKM 721sim 3 721sim 1 721sim 4 User space Kernel space Simulated Superscaler chip
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Phase 2 - Policies Two different types: Varying Schedule & Dispatch mechanisms –Greedy –Non work-conserving Weights –Bias logically similar parameters heavily. 8
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Testing Framework Core Exploration –Signature generation using projection functions –Selecting cores OSDCS Module –Virtual Machine with minimal Ubuntu –Run scripts 9
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Limitations Insensitive to behavioral changes in workload phases Oblivious to dynamically changing inputs to workloads 10
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Future Work Furthering OSDCS module to incorporate timing model Investigating specialized cores/accelerators. Devising projection functions for more parameters like IPB and LSQ sizing. Implement enhanced scheduling policies such as confidence based weighing. 11
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Backup slide 1: Preliminary results. Caveat 1 : Limited job diversity, Reason: Many jobs assert out on core configurations chosen. Caveat 2 : Synthetic Batch Batch : 5 5 5 1 5 1 5 1 5 1 1 1 {All same, diverse, All same} 12 Scheduling PolicyTotal execution time (s) Greedy FCFS 180.5 Greedy Intelligent 176.718 Non WrkConsv FCFS 248.9 Non WrkConsv Intelligent 233.64
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