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The Central Processing Unit Instruction Sets: Addressing Modes and Formats.

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Presentation on theme: "The Central Processing Unit Instruction Sets: Addressing Modes and Formats."— Presentation transcript:

1 The Central Processing Unit Instruction Sets: Addressing Modes and Formats

2 Addressing Modes The most common addressing techniques: zImmediate zDirect zIndirect zRegister zRegister Indirect zDisplacement (Indexed) zStack

3 Immediate Addressing zOperand is part of instruction zOperand = address field ze.g. ADD 5 yAdd 5 to contents of accumulator y5 is operand zNo memory reference to fetch data zFast zLimited range

4 Immediate Addressing Diagram OperandOpcode Instruction

5 Direct Addressing zAddress field contains address of operand zEffective address (EA) = address field (A) ze.g. ADD A yAdd contents of cell A to accumulator yLook in memory at address A for operand zSingle memory reference to access data zNo additional calculations to work out effective address zLimited address space

6 Direct Addressing Diagram Address A Instruction Memory Operand Opcode

7 Indirect Addressing (1) zMemory cell pointed to by address field contains the address of (pointer to) the operand zEA = (A) yLook in A, find address (A) and look there for operand ze.g. ADD (A) yAdd contents of cell pointed to by contents of A to accumulator

8 Indirect Addressing (2) zLarge address space z2 n where n = word length zMay be nested, multilevel, cascaded ye.g. EA = (((A))) xDraw the diagram yourself zMultiple memory accesses to find operand zHence slower

9 Indirect Addressing Diagram Address A Instruction Memory Operand Pointer to operand Opcode

10 Register Addressing (1) zOperand is held in register named in address filed zEA = R zLimited number of registers zVery small address field needed yShorter instructions yFaster instruction fetch

11 Register Addressing (2) zNo memory access zVery fast execution zVery limited address space zMultiple registers helps performance yRequires good assembly programming or compiler writing zc.f. Direct addressing

12 Register Addressing Diagram Instruction Registers Operand Register Address ROpcode

13 Register Indirect Addressing zC.f. indirect addressing zEA = (R) zOperand is in memory cell pointed to by contents of register R zLarge address space (2 n ) zOne fewer memory access than indirect addressing

14 Register Indirect Addressing Diagram Register Address R Instruction Memory Operand Opcode Pointer to Operand Registers

15 Displacement Addressing zEA = A + (R) zAddress field hold two values yA = base value yR = register that holds displacement yor vice versa

16 Displacement Addressing Diagram Register ROpcode Instruction Memory Operand Pointer to Operand Registers Address A +

17 Relative Addressing zA version of displacement addressing zR = Program counter, PC zEA = A + (PC) zi.e. get operand from A cells from current location pointed to by PC zc.f locality of reference & cache usage

18 Base-Register Addressing zA holds displacement zR holds pointer to base address zR may be explicit or implicit ze.g. segment registers in 80x86

19 Indexed Addressing zA = base zR = displacement zEA = A + R zGood for accessing arrays yEA = A + R yR++

20 Combinations zPostindex (indexing is performed after the indirection) zEA = (A) + (R) zPreindex (indexing is performed before the indirection) zEA = (A+(R)) z(Draw the diagrams)

21 Stack Addressing zA stack is a linear array of locations. zIt is sometimes referred to as a pushdown list or last-in-first-out (LIFO) queue. zA stack is a reserved block of locations. zOperand is (implicitly) on top of stack ze.g. yADDPop top two items from stack and add

22 Instruction Formats zLayout of bits in an instruction zIncludes opcode zIncludes (implicit or explicit) operand(s) zUsually more than one instruction format in an instruction set

23 Instruction Length zAffected by and affects: yMemory size yMemory organization yBus structure yCPU complexity yCPU speed zTrade off between powerful instruction repertoire and saving space

24 Allocation of Bits  The following interrelated factors go into determining the use of the addressing bits: zNumber of addressing modes (Sometimes an addressing mode can be indicated implicitly. In other cases, the addressing modes must be explicit, and one or more mode bits will be needed.) zNumber of operands zRegister versus memory (With a single user-visible register (usually called the accumulator), one operand is implicit and consumes no instruction bits. However, single- register programming is awkward and requires many instructions.)

25 Allocation of Bits zNumber of register sets (Most contemporary machines have one set of general-purpose registers, with typically 32 or more registers in the set.) zAddress range (For addresses that reference memory, the range of addresses that can be referenced is related to the number of address bits.) zAddress granularity (For addresses that reference memory rather than registers, another factor is the granularity of addressing. In a system with 16- or 32-bit words, an address can reference a word or a byte at the designer’s choice. Byte addressing is convenient for character manipulation but requires, for a fixed-size memory, more address bits.)


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