1. 9. Fault Modeling Reliable System Design 2011 by: Amir M. Rahmani

2. matlab1.ir Amir M. Rahmani Fault Modeling Why fault modeling? Stuck-at 0/1 fault model The single fault assumption Bridging and delay faults MOS transistors and CMOS Switch-level fault model – Stuck-on/open Functional Faults State Transition Fault Model

3. matlab1.ir Amir M. Rahmani Fault Modeling Fault Model: a set of assumed faults in a system such that testing for them will test for most faults of a specific class. Used for: Designing error detection mechanisms Designing test procedure Fault simulation Quality evaluation Hide complexities of actual defects. Infinitely many defects possible. Based on past knowledge of defect modes and modeling experience.

4. matlab1.ir Amir M. Rahmani Common Fault Models No model: test exhaustively Hardware fault models: – Gate level: stuck-at 0/1 bridging delay faults – Transistor level: stuck on/open bridging – Functional fault models Software fault model – Is there one?

5. matlab1.ir Amir M. Rahmani Fault mechanisms in hardware Temporary Permanent – Opens: broken connection, also near-opens – Shorts: unwanted connection, also near shorts – Can be seen Imperfect devices

6. matlab1.ir Amir M. Rahmani Stuck-at 0/1 Model Model: any one or more of these may be stuck at 0 or 1: a gate input, a gate output Assumptions: Only one line is faulty. Faulty line permanently set to 0 or 1. Fault can be at an input or output of a gate.

7. matlab1.ir Amir M. Rahmani Stuck-at 0/1 Example

8. Why Use Single Stuck-At Fault Model? Complexity is greatly reduced. Many different physical defects may be modeled by the same logical stuck-at fault. Single stuck-at Fault is technology independent. it been successfully used on TTL, ECL, CMOS, etc. Single stuck-at tests cover a large percentage of multiple stuck-at faults. Single stuck-at tests cover a large percentage of un-modeled physical defects. matlab1.ir Amir M. Rahmani

9. Bridging (Short) Fault Model Common assumption: only nearby lines can be bridged Model: Two lines x and y bridged can cause both to take the value – x AND y AND-bridging (0-dominance) – x OR y OR-bridging (1-dominance) – Depends on technology, transistor dimensions etc.

10. matlab1.ir Amir M. Rahmani Bridging Fault Example

11. matlab1.ir Amir M. Rahmani Delay Fault Model

12. matlab1.ir Amir M. Rahmani MOS Transistors

13. matlab1.ir Amir M. Rahmani CMOS NOR Gate

14. matlab1.ir Amir M. Rahmani Switch-level Fault Model (1)

15. matlab1.ir Amir M. Rahmani Switch-level Fault Model (2): Stuck-ON

16. Functional Faults Fault effects modeled at a higher level than logic for function modules, such as Decoders Multiplexers Adders Counters RAMs ROMs matlab1.ir Amir M. Rahmani

17. Functional Faults of Decoder matlab1.ir Amir M. Rahmani Instead of line L i, Line L j is selected In addition to L i, L j (or L k ) is selected None of the lines are selected

18. State Transition Fault Model matlab1.ir Amir M. Rahmani A fault causes a single state transition to a wrong destination state