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The Design of a Delta Sigma Modulator Presented by: Sameh Assem Ibrahim 24-July-2003
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Introduction Oversampling: f s > 2f m, OSR = f s /2f m > 1 Advantage 1: Relax anti- aliasing filter Advantage 2: Reduce in-band quantization noise and thus increase SNR Note that: A quantized signal ampled at (fs) will have all its noise power folded into the frequency band extending from 0 to (fs/2)
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The need for delta sigma modulation Nyquist converters: SNR = 1.76 + 6.02n Overampled: SNR = 1.76+6.02n+10log(OSR) Solution is Noise shaping through delta sigma modulators
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Proposed Architecture and Specifications ΣΔ Modulator Analog input Decimator Digital F S Analog Output F N 1 bitMultiple bits Integrator 1-Bit D/A ++ -- x(n) y(n) fsfs 3.3V Supply Voltage <130 mW Power consumption 20 kHz Input signal BW 128 OSR 60dB SNR 2V Reference Voltage
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Simulink Model Integrator1Integrator2 Comparator (1 bit Quantizer) DAC To achieve stability
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Circuit Used
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Simulation Results
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