1. Lecture 15: Computer Arithmetic Today’s topic –Division 1

2. Division Check for 0 divisor Long division approach –If divisor ≤ dividend bits 1 bit in quotient, subtract –Otherwise 0 bit in quotient, bring down next dividend bit Restoring division –Always performs subtract first –Do the subtract, and if remainder goes < 0, add divisor back Signed division –Divide using absolute values –Adjust sign of quotient and remainder as required 1001 1000 1001010 -1000 10 101 1010 -1000 10 n-bit operands yield n-bit quotient and remainder quotient dividend remainder divisor 2

3. 3 Division 1001 ten Quotient Divisor 1000 ten | 1001010 ten Dividend 0001001010 0001001010 0000001010 0000001010 100000000000  0001000000  0000100000  0000001000 Quo: 0 000001 0000010 000001001 At every step, shift divisor right and compare it with current dividend if divisor is larger, shift 0 as the next bit of the quotient if divisor is smaller, subtract to get new dividend and shift 1 as the next bit of the quotient

4. Division Hardware Initially dividend Initially divisor in left half 4

5. 5 Divide Example Divide 7 ten (0000 0111 two ) by 2 ten (0010 two ) IterStepQuotDivisorRemainder 0Initial values 1 2 3 4 5

6. 6 Divide Example Divide 7 ten (0000 0111 two ) by 2 ten (0010 two ) IterStepQuotDivisorRemainder 0Initial values00000010 00000000 0111 1Rem = Rem – Div Rem < 0  +Div, shift 0 into Q Shift Div right 0000 0010 0000 0001 0000 1110 0111 0000 0111 2Same steps as 10000 0001 0000 0000 1000 1111 0111 0000 0111 3Same steps as 100000000 01000000 0111 4Rem = Rem – Div Rem >= 0  shift 1 into Q Shift Div right 0000 0001 0000 0100 0000 0010 0000 0011 5Same steps as 400110000 0001

7. Optimized Divider One cycle per partial-remainder subtraction Looks a lot like a multiplier! –Same hardware can be used for both 7

8. Faster Division Can’t use parallel hardware as in multiplier –Subtraction is conditional on sign of remainder Faster dividers (e.g. SRT devision) generate multiple quotient bits per step –Still require multiple steps 8

9. MIPS Division Use HI/LO registers for result –HI: 32-bit remainder –LO: 32-bit quotient Instructions –div rs, rt / divu rs, rt –No overflow or divide-by-0 checking Software must perform checks if required –Use mfhi, mflo to access result 9

10. 10 Divisions involving Negatives Simplest solution: convert to positive and adjust sign later Note that multiple solutions exist for the equation: Dividend = Quotient x Divisor + Remainder +7 div +2 Quo = Rem = -7 div +2 Quo = Rem = +7 div -2 Quo = Rem = -7 div -2 Quo = Rem =

11. 11 Divisions involving Negatives Simplest solution: convert to positive and adjust sign later Note that multiple solutions exist for the equation: Dividend = Quotient x Divisor + Remainder +7 div +2 Quo = +3 Rem = +1 -7 div +2 Quo = -3 Rem = -1 +7 div -2 Quo = -3 Rem = +1 -7 div -2 Quo = +3 Rem = -1 Convention: Dividend and remainder have the same sign Quotient is negative if signs (of dividend and divisor) disagree These rules fulfil the equation above