1. Avishai Wool lecture 8 - 1 Introduction to Systems Programming Lecture 8 Input-Output

2. Avishai Wool lecture 8 - 2 Devices, Controllers, and I/O Architectures

3. Avishai Wool lecture 8 - 3 I/O Device Types Block Devices –block size of 512-32768 bytes –block can be read/written individually –typical: disks / floppy / CD Character Devices –delivers / accepts a sequential stream of characters –non-addressable –typical: keyboard, mouse, printer, network Other: Monitor, Clock

4. Avishai Wool lecture 8 - 4 Typical Data Rates

5. Avishai Wool lecture 8 - 5 Device Controllers I/O devices have components: –mechanical component –electronic component The electronic component is the device controller –may be able to handle multiple devices Controller's tasks –convert serial bit stream to block of bytes –perform error correction as necessary –make available to main memory

6. Avishai Wool lecture 8 - 6 Communicating with Controllers Controllers have registers to deliver data, accept data, etc. Option 1: special I/O commands, I/O ports in r0, 4 “4” is not memory address 4, it is I/O port 4 Option 2: I/O registers mapped to memory addresses

7. Avishai Wool lecture 8 - 7 Memory-Mapped Registers Controller connected to the bus Has a physical “memory address” like B0000000 When this address appears on the bus, the controller responds (read/write to its I/O register) RAM configured to ignore controller’s address

8. Avishai Wool lecture 8 - 8 Possible I/O Register Mappings Separate I/O and memory space (IBM 360) Memory-mapped I/O (PDP-11) Hybrid (Pentium, 640K-1M are for I/O)

9. Avishai Wool lecture 8 - 9 Advantages of Memory Mapped I/O No special instructions, can be written in C. Protection by not putting I/O memory in user virtual address space. All machine instructions can access I/O: LOOP: test *b0000004 // check if port_4 is 0 beq READY branch LOOP READY:...

10. Avishai Wool lecture 8 - 10 Disadvantages of Memory Mapped I/O Memory and I/O controllers have to be on the same bus: –modern architectures have separate memory bus! –Pentium has 3 buses: memory, PCI, ISA

11. Avishai Wool lecture 8 - 11 Bus Architectures (a) A single-bus architecture (b) A dual-bus memory architecture

12. Avishai Wool lecture 8 - 12 Memory Mapped with Separate Bus I/O Controllers do not see memory bus. Option 1: all addresses to memory bus. No response  I/O bus Option 2: Snooping device between buses –speed difference is a problem Option 3 (Pentium): filter addresses in PCI bridge

13. Avishai Wool lecture 8 - 13 Structure of a large Pentium system

14. Avishai Wool lecture 8 - 14 Principles of I/O Software

15. Avishai Wool lecture 8 - 15 Goals of I/O Software Device independence –programs can access any I/O device –without specifying device in advance ·(floppy, hard drive, or CD-ROM) Uniform naming –name of a file or device a string or an integer –not depending on which machine Error handling –handle as close to the hardware as possible

16. Avishai Wool lecture 8 - 16 Goals of I/O Software (2) Synchronous vs. asynchronous transfers –blocked transfers vs. interrupt-driven Buffering –data coming off a device cannot be stored in final destination Sharable vs. dedicated devices –disks are sharable –tape drives would not be

17. Avishai Wool lecture 8 - 17 How is I/O Programmed Programmed I/O Interrupt-driven I/O DMA (Direct Memory Access)

18. Avishai Wool lecture 8 - 18 Programmed I/O Steps in printing a string

19. Avishai Wool lecture 8 - 19 Polling Busy-waiting until device can accept another character Example assumes memory- mapped registers

20. Avishai Wool lecture 8 - 20 Properties of Programmed I/O Simple to program Ties up CPU, especially if device is slow

21. Avishai Wool lecture 8 - 21 Interrupts Revisited bus

22. Avishai Wool lecture 8 - 22 Interrupt-Driven I/O Code executed when print system call is made Interrupt service procedure

23. Avishai Wool lecture 8 - 23 Properties of Interrupt-Driven I/O Interrupt every character or word. Interrupt handling takes time. Makes sense for slow devices (keyboard, mouse) For fast device: use dedicated DMA controller –usually for disk and network.

24. Avishai Wool lecture 8 - 24 Direct Memory Access (DMA) DMA controller has access to bus. Registers: –memory address to write/read from –byte count –I/O port or mapped-memory address to use –direction (read from / write to device) –transfer unit (byte or word)

25. Avishai Wool lecture 8 - 25 Operation of a DMA transfer

26. Avishai Wool lecture 8 - 26 I/O Using DMA code executed when the print system call is made interrupt service procedure

27. Avishai Wool lecture 8 - 27 DMA with Virtual Memory Most DMA controllers use physical addresses What if memory of buffer is paged out during DMA transfer? Force the page to not page out (“pinning”)

28. Avishai Wool lecture 8 - 28 Burst or Cycle-stealing DMA controller grabs bus for one word at a time, it competes with CPU bus access. This is called “cycle-stealing”. In “burst” mode the DMA controller acquires the bus (exclusively), issues several transfers, and releases. –More efficient –May block CPU and other devices

29. Avishai Wool lecture 8 - 29 Concepts for review TLB Local/Global page replacement Demand paging Page-fault-frequency monitor I/O device controller in/out commands Memory-mapped registers PCI Bridge Programmed I/O (Polling) Interrupt-driven I/O I/O using DMA Page pinning DMA cycle-stealing DMA burst mode