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CERDEC-06/27/2006 21.1 Digital Array Radar Technology Development March 20, 2007 Dr. Barry S. Perlman Associate Director for Technology US Army CERDEC.

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Presentation on theme: "CERDEC-06/27/2006 21.1 Digital Array Radar Technology Development March 20, 2007 Dr. Barry S. Perlman Associate Director for Technology US Army CERDEC."— Presentation transcript:

1 CERDEC-06/27/2006 21.1 Digital Array Radar Technology Development March 20, 2007 Dr. Barry S. Perlman Associate Director for Technology US Army CERDEC Ft. Monmouth, NJ 07703

2 CERDEC-06/27/2006 21.2 Introduction Development of Digital Array Radar High-Power GaN MMICs Integrated Low-Cost Modules SiRF Integrated Circuits Antenna Subpanel Development Summary/Conclusions

3 CERDEC-06/27/2006 21.3 DAR Program Overview Objective: Develop technology for a low-cost, air-cooled active electronically scanned radarApplication: Air defense, surveillance, counter mortar, surveillanceContributors: Lockheed-Martin MS2 CREE Semiconductor Purdue University Sierra Monolithics

4 CERDEC-06/27/2006 21.4 Development of DAR Technology Objective: Low Cost Air Cooled Phased Array Technology Key is Leap to Digital Architecture and Maximal use of Commercial Technology

5 CERDEC-06/27/2006 21.5 WBG Front Ends Very High Power High Temperature Operation Very High PAE Minimization of Cooling System Elimination of Circulator & Limiter High Voltage Operation WBG Technology is a Key enabler to achieve an Affordable Radar Panel Technology Low Cost SMT Manufacturing Multi-layer Board technology Air Cooled Low Cost Radiating Element Light Weight Building Block GaN MMICs Panel Cross Section

6 CERDEC-06/27/2006 21.6 GaN Dig Incorporation of Switch Limiter/LNA on MMIC Possible Dig GaAs - Based T/R Module Enabling T/R Module Technology SOI or SiGe Back End - GaN Front End Low Cost/Power Si Based Technology High Efficiency GaN HPA enables lower complexity, cost, and weight air cooled systems. Higher Power GaN HPAs and robust GaN LNAs eliminate MMIC chip count & Cost. Higher voltage operation of GaN enables a more efficient power system High Temperature Operation Phase IIPhase I

7 CERDEC-06/27/2006 21.7 T/R MMIC Block Diagram 6 Bit Phase Shifter 6 Bit Attenuator T/R Switch 2 Stage HPA Gain Block 2 Stage LNA Antenna Port Beamformer Port Gain Block

8 CERDEC-06/27/2006 21.8 Mask Layout of GaN T/R MMIC

9 CERDEC-06/27/2006 21.9 Low Cost Array Undergoing System Testing at LM Four Transceiver Module Test Configuration during Bench Testing - Beamforming test capability for both Tx & Rx modes - Beamforming test capability for both Tx & Rx modes - Three independent transceiver modules - Three independent transceiver modules - One Module as common RF & computer interface - One Module as common RF & computer interface Test Configuration Block Diagram Xcvr #1 Xcvr #2 Xcvr #3 Xcvr #4 Test Computer RF Power Splitter/Combiner Phase Reference DC Power Test Equipment Optical Data Rx & Tx Combined RF Tx & Rx Element RF Data & Ctrl Reference & Power RF Attenuator  Receive sensitivity & linearity goals achieved  Transmitter power & linearity goals achieved  Radar frequency control, transceive mode & BW verified  EMI Immunity verified  Phase locking works across multiple modules  Optical data links operate @ 2.5 GB/sec  Phase calibration works  Distributed beamforming works  Adequate radar phase noise floors achieved Successful Prototype

10 CERDEC-06/27/2006 21.10 Antenna SubPanel Development April 2007 December 2007 Integration of IC’s into Subarray Panel Picture of plastic integrated IC. Jan. 2007 New Array Creation of fully integrated receive subpanel array Characterization and Package of Full GaN MMIC Mitigation of Active Impedance Versus Scan Angles First T/R Array June 2007 Creation of fully integrated Array (T/R)  

11 CERDEC-06/27/2006 21.11 Silicon Digital Beam Former Back End Multiple Receivers on a Single IC Possibly Utilizing Advanced A/D and Multicore Processor Technologies GaN MMIC Front Ends Pushing the logical limits of integration on silicon with multiple receive channels on a single chip. Demonstration of necessary Linearity in Standard Silicon Processes Processor A/D Currently Antenna Array Only – RF out Digital Array Integration RF Out

12 CERDEC-06/27/2006 21.12 Conclusion :Leverage/Share R&D Conclusion : Leverage/Share R&D Army advantages: MPAR Offers ……… -Lowest cost S-band TRMs -Economic production Qty’s -Dual-use Cooperation -Thru-the-sensor Weather : Own the NIGHT ……… Own the WEATHER….. MPAR advantages: Army Offers ……. -GaN investment head start -PAR experience @ S-band -Large-scale sensor integration -Multi-mission radars Business cases Synergy for the Future ……………………


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