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Published byCori Vivien Cameron Modified over 9 years ago
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Real time DSP Professors: Eng. Julian S. Bruno Eng. Jerónimo F. Atencio Sr. Lucio Martinez
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Analog to digital Converter
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The BIG picture Real time algorithms Results FAST!
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Signals Amplitude Frequency Noise
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Continuous Signal
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External Noise
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Quantization Noise Analog Input range: Vin = 0 to FS (Full Scale) Resolution: N = 3 bits Code: 2 N = 8 Full Scale = 10V Voltage step or quantum (Q = FS/N)
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Unipolar Binary Codes ScaleFS (10V)Binary 7/88,75111 3/47,5110 5/86,25101 1/25100 3/83,75011 1/42,5010 1/81,25001 00000
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Bipolar Binary Codes ScaleFS (+/-5V)Two Comp. 3/43,75011 1/22,5010 1/41,25001 00000 - 1/4-1,25111 - 1/2-2,5110 - 3/4-3,75101 -5100
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Errors in a data converter
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Quantization noise
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Noise Floor AD7722
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Noise Floor
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Cuantización uniforme
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Cuantización no uniforme
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A-law
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Tabla de codificación
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Companding
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Expansion
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Differences Between A−Law and u−Law
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Basic ADC Analog: Analog Input Reference Voltage Analog Ground Analog Power Supply Digital: Digital output Control Signals Sampling Clock Digital Ground Digital Power Supply
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1-Bit DAC
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Flash converters Expensives High power Resolution limited to around 8-bits Large chip size Fast Resistors: 2 N Comparators: 2 (N-1)
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Flash converters
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SAR The accuracy and linearity is determined by the DAC Available in resolutions up to 16-bits
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SAR
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Delta Modulation
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First-Order Sigma-Delta ADC
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Analysis of Sigma-Delta Modulator The integrator acts as a lowpass filter to the input signal and a highpass filter to the quantization noise
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Oversampling
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Second-Order Sigma-Delta ADC
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Architecture tradeoffs
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