1. FPGA PID Heater/Cooler Controller Galt Design, Inc.

2. Short Description PID control of Heater or TEC* through PWM pulsing
Takes input from Thermistor after ADC for temperature information
PID, deadband, integrator_limit, ramping settings available
Available in both Verilog and VHDL HDL code
Can be used in both FPGA and ASIC designs
* TEC is Thermo Electric Cooling device. It uses the Peltier effect to both heat and cool.

3. Example PID Thermal controller FPGA
PID Thermal controller FPGA Example
Done Interrupt
Set point, parameters
CPU interface 1
PID Controller
Heater 1
TEC 8 2
Serial to parallel
Thermisters ADC

4. PID Thermal Control Diagram
Derivative Gain Register *
D term
Temperature Setpoint Register
Integral Gain Register - * 
Error
Accumulator
I term
PWM pulses to Heaters/TECs
Thermistor ADC output *
P term
Voltage to Temperature LUT
Proportional Gain Register

5. FPGA Code Organization
U_adc(adc_control.v)
U_loop_tec0(loop_controller.v)
U_loop_ht0(loop_controller.v)
U_htrio(heater_io_control.v)
U_profile_buf(afiforam_256x16)
conv_lut(dpbram_4096x16)

6. Contact information
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