Presentation is loading. Please wait.

Presentation is loading. Please wait.

Implementing Rule Checking Early in the Design Cycle to Reduce Design Iterations and Verification Time Kent Moffat DesignAnalyst Product Manager Mentor.

Similar presentations


Presentation on theme: "Implementing Rule Checking Early in the Design Cycle to Reduce Design Iterations and Verification Time Kent Moffat DesignAnalyst Product Manager Mentor."— Presentation transcript:

1 Implementing Rule Checking Early in the Design Cycle to Reduce Design Iterations and Verification Time Kent Moffat DesignAnalyst Product Manager Mentor Graphics

2 Moffat S204/MAPLD 2004 2 Design Checking: Evaluating RTL code to determine if any violations exist based on a set of coding rules

3 Moffat S204/MAPLD 2004 3 What Problems Do Design Checkers Solve? n Verification consumes 50-70% of FPGA design cycles — Design checking finds and fixes errors earlier in the design process to reduce costly verification and other downstream tool iterations later n Design reuse is essential to meet FPGA design schedule constraints — Design checking helps ensure adherence to HDL coding guidelines essential for efficient reuse

4 Moffat S204/MAPLD 2004 4 Early Checking Design Flow SimulationSynthesisP & R HDL Design Corp Rule Policies Specific Vendor Policies Group Rule Policies Design Checker

5 Moffat S204/MAPLD 2004 5 Encapsulate Knowledge Best Practices Reuse Techniques Known Issues Checking Tool Apply Knowledge Understand Design Issues Detect & Fix Issues Share Knowledge Team Access Issue Reports Design Checking Tenets HDL Checking Tool

6 Moffat S204/MAPLD 2004 6 Today’s Focus Checker Evolution C Verilog VHDL Predictive Analysis Push as much checking as possible to the specification phase Syntax Semantics Style Rules Static Dynamic The beginning ? SystemC PSL

7 Moffat S204/MAPLD 2004 7 Why Focus on Static Checks? Syntax Style Language Static Rules Gate-Level Engine Driven High Low Static Checkers Interfaced Engines Ease of Use Performance # of Users Use Frequency Checks

8 Moffat S204/MAPLD 2004 8 How Fast is Fast Enough? DesignLinesSecRulesChecks/Sec Ethernet9,8239160174,631 Leon uP14,86010160237,769 PicoJava60,75180160121,502 MicroSparc139,08029016076,734   Tests run on a PC: 2 GHz Pentium 4, RAM 1 G, Windows 2000   Used same set of rules in each test including   HDL syntax and semantics   Reuse Methodology Manual ruleset   Checks/Sec = (Lines * Rules) /Sec (Lines include comments)

9 Moffat S204/MAPLD 2004 9 What Types of Checks can be Performed? n n Standard language & syntax checks n n Good coding practices n n Format & readability n n Downstream tool checks n n Portability/reuse checks n n Cross-language compatibility

10 Moffat S204/MAPLD 2004 10 Example Rule Categories n n Allow n n Assignments n n Clocks & Resets n n Complexity n n Conditions n n Configurations n n Declarations n n Directives n n FSM n n Gates n n HDL Syntax & Semantics n n Instances n n Labels n n Naming n n Order n n Partitioning n n Race Conditions n n Ranges n n Registers n n Sensitivity n n Style n n Subprograms n n VITAL

11 Moffat S204/MAPLD 2004 11 Reuse Methodology Manual Examples

12 Moffat S204/MAPLD 2004 12 Value of Early Detection Specification Simulation Synthesis P & R $$$$ Cost = [(T fix + T reiterate ) * Cost Engineer ] + T market Reuse Cost n n Cost of error detection increases further downstream n n Cost is multiplied if code must be edited and re-verified for subsequent designs Problem $ Time = $ …

13 Moffat S204/MAPLD 2004 13 Understanding the Process Rule Set Policy Parameterized Base Rules Define Ruleset Add Rulesets to Policy Results Table Graphics Source Checker n n Text Editor n n Graphical Editors n n Design browser n n Shell level Run from: 1 2 3 4 Reports

14 Moffat S204/MAPLD 2004 14 Building Custom Rulesets n n Create ruleset(s) n n Use search to find a base rule n n Access online help n n Drag & drop base rulesets & rules into your own rulesets n n Change rule parameters n n Create policies that contain rulesets n n Disable rules n n Lock down & share rules with the team

15 Moffat S204/MAPLD 2004 15 Examining Results   High-level summary   Totals rolled up through groups   Expand, collapse, & cross-ref   Group, filter, & sort results   View only what you want   Save the views   See the code fragment & Msg.   Cross reference   View message & rule help   Disable rules

16 Moffat S204/MAPLD 2004 16 Analyze Results within Text Editor n n Code Browser indicates errors & warnings n n Violation report provides navigation n n Code lines highlighted n n Hover help for each violation n n Step through errors n n Show rule/rule help n n Rerun analysis

17 Moffat S204/MAPLD 2004 17 View Reports n n Export Summary report as CSV, TSV, or HTML n n Export Result Table as CSV, TSV, or HTML n n Export rules used in ASCII

18 Moffat S204/MAPLD 2004 18 Assisted Violation Correction n n If a tool knows exactly what the problem is & how to fix it, then …. n n A good percentage of rule violations fit this scenario n n The tool should have modes of correction: “do it”, step through & change, etc.

19 Moffat S204/MAPLD 2004 19 Challenges and Limitations n Mapping desired design rules into checking tool — Not always obvious match — Custom rule creation may be necessary n Tradeoff between run-time tool performance and depth of analysis — Must be fast to be used frequently — Deep analysis takes longer n Some rule violations are not detectable by static analysis techniques

20 Moffat S204/MAPLD 2004 20 Summary n n HDL design checking tools save design time by identifying errors earlier to avoid costly iterations downstream n n Design checkers help ensure that HDL code is reusable from the start n n Key to frequent usage is high runtime performance and interactivity


Download ppt "Implementing Rule Checking Early in the Design Cycle to Reduce Design Iterations and Verification Time Kent Moffat DesignAnalyst Product Manager Mentor."

Similar presentations


Ads by Google