1. More FSM Design CT 101 – Computing Systems

2. String Checker - Specification Inputs a string of bits, one per clock cycle When the previous three bits form the pattern 110, it sets the output match M=1; otherwise M=0 The pattern is checked continuously through the entire bit stream; the system DOES NOT check the first three bits and then the next three bits and so on. The system checks bits 123 and then bits 234 and then bits 345 and so on.

3. String Checker – State table (i) The last there bits received represent the state of the system Bits are received from left to right (i.e. the current state is S0 (000), if a new bit with value 1 is received, then the next value of the state is S1 (001) Each state goes from one state in two possible next states, depending on the value of I Example S2 corresponds to the case where last three bits were 010: –I=0 next state is S4 (100), output is M=0 –I=1 next state is S5 (101), output is M=0 Present State INext State M S0 (000)0S00 S0 (000)1S10 S1 (001)0S20 S1 (001)1S30 S2 (010)0S40 S2 (010)1S50 S3 (011)0S61 S3 (011)1S70 S4 (100)0S00 S4 (100)1S10 S5 (101)0S20 S5 (101)1S30 S6 (110)0S40 S6 (110)1S50 S7 (111)0S61 S7 (111)1S70

4. String Checker – State diagrams (i)

5. String Checker – Hardware Implementation Assign values to the states –S0 assign 000 and so on Start to design the hardware for this implementation, starting with generic –Design the next state logic –Design the output logic P2P1P0IN2N1N0 0000 1001 0010 0011011 0100100 0101101 0110110 0111111 1000000 1001001 1010010 1011011 1100100 1101101 1110110 1111

6. String Checker – Next state logic –N2 = P1 –N1 = P0 –N0 = I P0I 00011110 P2P1 0000 0 0 011111 111111 100000 N2 P0I 00011110 P2P1 0001 1 0 0101 1 0 1101 1 0 1001 1 0 P0I 00011110 P2P1 0000 1 1 0100 1 1 1100 1 1 1000 1 1 N1 N0

7. String Checker – Moore Machine The output logic is straight forward; when the machine is in state S6 the M is 1, otherwise is 0. This can be implemented as: –M = P2P1P0’

8. String Checker – Mealy Machine M = P1P0I’ P0I 00011110 P2P1 0000 0 0 010001 110001 100000 M P2P1P0IM 00000 10 00100 10 01000 10 01101 10 10000 10 10100 10 11000 10 11101 10

9. String Checker – State table (ii) Sometimes there are simpler alternative methods: –S0 – no bits matched –S1 – one bit matched –S2 – two bits matched S3 – three bits matched In each state, consider the possible values of the input bit and determine which next state is appropriate Present State INext State M S0 (---)0 0 1S1 (--1)0 0S0 (---)0 S1 (--1)1S2 (-11)0 0S3 (110)1 S2 (-11)1 0 S3 (110)0S0 (---)0 S3 (110)1S1 (--1)0

10. String Checker – State diagrams (ii)

11. Toll Booth Controller - Specification Has two input sensors: –Car sensor C (car in toll booth) = 1 if there is a car or 0 if there is no car –Coin sensor (and its value): I1I0 = 00 – no coin has been inserted I1I0 = 01 – a 5 cents coin has been inserted I1I0 = 10 – a 10 cents coin has been inserted I1I0 = 11 – a quarter coin has been inserted Two output lights and one alarm output –When a car pulls into the toll booth, a red light (R) is lit until the driver deposits at least 35 cents, when the red light goes off and the green light (G) is lit; –The green light remains lit until the car leaves the toll booth, when this happen, the red light is lit again –If the car leaves the toll booth without paying the full amount, the red light is lit and the alarm (A) sound –The alarm remains active until another car pulls into the booth

12. Toll Booth Controller – States definition StateConditionRGA SnocarNo car in toll booth100 S0Car in toll booth, 0 cents paid100 S5Car in toll booth, 5 cents paid100 S10Car in toll booth, 10 cents paid100 S15Car in toll booth, 15 cents paid100 S20Car in toll booth, 20 cents paid100 S25Car in toll booth, 25 cents paid100 S30Car in toll booth, 30 cents paid100 SpaidCar in toll booth, toll paid010 ScheatCar left toll booth without paying full toll 101

13. Toll Booth Controller – State table Current State CI1I0Next state RGA Snocar0XXSnocar100 1XXS0100 Spaid0XXSnocar100 Spaid1XXSpaid010 Scheat0XXSnocar101 S00XXScheat101 S0100S0100 101S5100 S0110S10100 S0111S25100 S50XXScheat101 S5100S5100 101S10100 S5110S15100 S5111S30100 S100XXScheat101 S10100S10100 101S15100 S10110S20100 S10111Spaid010 Current State CI1I0Next state RGA S150XXScheat101 S15100S15100 101S20100 S15110S25100 S15111Spaid010 S200XXScheat101 S20100S0100 S20101S25100 S20110S30100 S20111Spaid010 S250XXScheat101 S25100S25100 101S30100 S25110Spaid010 S25111Spaid S300XXScheat101 S30100S30100 101Spaid010 S30110Spaid010 S30111Spaid010

14. Toll Booth Controller – Moore State diagram

15. References “Computer Systems Organization & Architecture”, John D. Carpinelli, ISBN: 0- 201-61253-4