1. NATW 2008 Using Implications for Online Error Detection Nuno Alves, Jennifer Dworak, R. Iris Bahar Division of Engineering Brown University Providence, RI 02912 Kundan Nepal Electrical Engineering Dept. Bucknell University Lewisburg, PA 17837

2. Online error detection Purpose: Detect transient faults that may occur in a circuit during operation Critical as circuits scale to smaller sizes “Easy” in memory logic In circuit logic not so easy

3. Common online detection techniques 1.Stored pre-computed test vectors in hardware 2.Duplicating the computation of disjoint hardware elements and voting on the result 3.Use of check bits

4. Our approach Find invariant relationships in a circuit Violations of these expected relationships can identify errors

5. Error detection implementation

6. Invariant relationships in circuits n5=1 n8=0 n1 n2 n3 n4 n5 n6 n7 n8 These relationships are logic implications

7. Error detection with implications n5=1 & n8=1 will generate an error in checker logic n1 n2 n3 n4 n5 n6 n7 n8 n5=1 n8=0 ERROR

8. How we find implications Collect Logic Values At Each Site Validate Implications Find Implications Verilog Description Logic Simulation

9. We have implications. Now what? Select Useful Implications Remove Redundant Implications Pick Best Implications For Given HW Overhead

10. Why should we remove implications? With all implications we can generate checker logic for each implication. Inefficient! ▫A circuit can contain thousands of implications ▫generating separate checker logic for each implication could more than double circuit size. We want to detect only the “most important” implications.

11. Removing redundant implications n1 n2 n3 n4 n5 n6 n7 n8 n9 n10 n12 n13 n11 i 1 : n 3 =0  n 8 =0 i 2 : n 4 =1  n 12 =0 i 3 : n 4 =1  n 8 =0 i 4 : n 12 =0  n 8 =0 i 5 : n 4 =1  n 13 =0

12. Removing low coverage implications We only want implications that: ▫Detect many faults ▫Identify hard-to-detect faults ▫Cover faults not detected by other implications Finding these important implications requires: ▫fault analysis to determine the specific fault coverage for each implication

13. Reducing the number of implications

14. Case 1 Case 2 Case 3 Case 4 Error Propagates To Output  An Implication is Violated  Covering faults with implications For each random input vector, and at each fault, the implications-based circuit operation can fall into the following 4 categories:

15. Average distribution of the 4 scenarios

16. How often do we detect errors? Case1/[Case1+Case4]

17. Implications with fixed HW budgets Given a fixed HW budget, by how much can we reduce the probability of an undetected error?

18. Conclusions Practical online error detection alternative based on implication validation No modification of targeted logic Checker logic is added off the critical path and run in parallel rest of circuit. For several circuits, we can detect almost 90% of all errors that propagate to a primary output. With only a 10% area overhead, probability of an error being both observable and undetected is reduced to 11% on average