1. CHAPTER 2 Digital Combinational Logic/Arithmetic Circuits

2.  Converters  Converters - Comparator - Decoder - Encoder - Code Converter

3. Comparator(1)  Compares two binary strings (or binary words) to determine if they are exactly equal.  Truth table for a comparator: A BA=B 001 010 100 111

4.  E.g. to design a comparator to evaluate two 4 bit numbers, we need 4 Ex-NORs and a 4 input AND gates  8 bit magnitude comparator: Comparator(2)

5. Encoder(1)  Encoder converts information such as decimal number or an alphabetical character into some binary coded form.  Encoder is usually used for:  Data representation  Data security  Data compression

6. Example: 8-to-3 Binary Encoder Encoder(2) 0

7. Design a Decimal-to-BCD Encoder: 1. Comes out with a truth table (input/output) 2. From a truth table, get the equation for each output 3. Draw a circuit for basic decimal-to-BCD encoder based on output equation. Note : Do not forgot to label LSB & MSB Encoder(3)

8.  A decoder is a circuit that creates an output based on the binary states of a given input Decoder(1)

9.  In digital electronics, a decoder can take the form of a multiple-input, multiple-output logic circuit that converts coded inputs into coded outputs, where the input and output codes are different. e.g. n-to- 2 n BCD decoders.  Enable inputs must be ON for the decoder to function, otherwise its outputs assume a single "disabled" output code word. Decoding is necessary in applications such as data multiplexing, 7 segment display and memory address decoding. Decoder(2)

10. Example: 3 to 8 Binary Decoder Decoder(3)

11. Decoder(4)

12. Example: 7 Segment Decoder  A 7 segment decoder has 4-bit BCD input and the seven segment display code as its output.  In minimizing the circuits for the segment outputs all non-decimal input combinations (1010, 1011, 1100,1101, 1110, 1111) are taken as don’t-cares ( X ) /Bl D C B A a b c d e f g 0 x x x x 0 0 0 0 0 0 0 1 0 0 0 0 1 1 1 1 1 1 0 1 0 0 0 1 0 1 1 0 0 0 0 1 0 0 1 0 1 1 0 1 1 0 1 1 0 0 1 1 1 1 1 1 0 0 1 1 0 1 0 0 0 1 1 0 0 1 1 1 0 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 0 0 1 1 1 1 1 1 0 1 1 1 1 1 1 0 0 0 0 1 1 0 0 0 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 0 0 1 1 1 1 0 1 0 0 0 0 1 1 0 1 1 1 0 1 1 0 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 0 1 1 1 1 1 0 1 1 0 0 1 0 1 1 1 1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 -- don’t care inputs -- Decoder(5)

13.  Example: Application Decoder(6)

14.  Device that converts one type of binary representation to another.  Example : BCD to binary and binary to Gray code.  Binary code vs. Gray Code. To convert binary to Gray code or Gray code to binary, we use X-OR gates. How??? Code Converter(1)

15.  Also known as Data selector.  SELECT input code determines which input is transmitted to output Z. A 2 input multiplexer Multiplexer(1)

16.  A multiplexer or MUX is a device that selects one of several analog or digital input signals and forwards the selected input into a single line. A multiplexer of 2 n inputs has n select lines, which are used to select which input line to send to the output.  An electronic multiplexer makes it possible for several signals to share one device or resource.  E.g: one ADC or one communication line, instead of having one device per input signal. Multiplexer(2)

17. A 4 input multiplexer Multiplexer(3)

18.  Larger multiplexers can be constructed from smaller ones.  An 8-to-1 multiplexer can be constructed from smaller multiplexers as shown: Multiplexer(4)

19.  Example: Application Multiplexer(5)

20.  Data input is transmitted to only one of the outputs as determined by select input code 1-line-to-8-line multiplexer Demultiplexer(1)

21. Demultiplexer(2)  A demultiplexer (or DEMUX) is a device taking a single input signal and selecting one of many data- output-lines, which is connected to the single input.  A multiplexer is often used with a complementary demultiplexer on the receiving end.  An electronic multiplexer can be considered as a multiple-input, single-output switch, and a demultiplexer as a single-input, multiple-output switch.

22.  Example: 1- to -4 Demultiplexer Demultiplexer(3)

23. Example : Mux-Demux Application  This enables sharing a single communication line among a number of devices.  At any time, only one source and one destination can use the communication line.

24.  Parity Generator/Checkers  Parity Generator/Checkers - Error Detection - Odd Parity - Even Parity

25. Error-Detection(1)  A parity bit is a scheme for detecting errors during transmission of binary info.  A parity bit is an extra bit included with the binary message to make the number of 1’s either odd or even. The message, including the parity bit, is transmitted and then checked at the receiving end for errors. An error is detected if the checked parity does not correspond to the one transmitted. parity generator.  The circuit that generates the parity bit in the transmitter is a parity generator. parity checker.  The circuit that checks the parity bit in the receiver is a parity checker.

26. Error-Detection(2) Parity generator truth table * For odd parity, the bit P is generated so as to make the number of 1’s odd (including P) X Y Z P 0 0 0 1 0 0 1 0 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 1 1 1 1 0

27.  The three-bit message and parity bit are transmitted to their destination, where they are applied to a parity checker circuit. An error occurs during transmission if the parity of the four bits is even, since the binary info transmitted was originally odd. The output C of the parity checker should be a 1 when an error occurs, i.e. when the number of 1’s in the four inputs is even. X Y Z P C 0 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 0 1 1 1 0 1 0 0 0 0 1 0 1 1 0 1 1 0 1 0 1 1 1 0 1 0 0 0 0 1 0 0 1 1 1 0 1 0 1 1 0 1 1 0 1 1 0 0 1 1 1 0 1 0 1 1 1 0 0 1 1 1 1 1 Error-Detection(3)

28.  The three-bit message and parity bit are transmitted to their destination, where they are applied to a parity checker circuit. An error occurs during transmission if the parity of the four bits is even, since the binary info transmitted was originally odd. The output C of the parity checker should be a 1 when an error occurs, i.e. when the number of 1’s in the four inputs is even. X Y Z P C 0 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 0 1 1 1 0 1 0 0 0 0 1 0 1 1 0 1 1 0 1 0 1 1 1 0 1 0 0 0 0 1 0 0 1 1 1 0 1 0 1 1 0 1 1 0 1 1 0 0 1 1 1 0 1 0 1 1 1 0 0 1 1 1 1 1 Error-Detection(3)

29.  Parity is used in digital circuits to check for errors in transmission.  In Four bit transmission a parity bit is added to make the fifth bit.  In a eight bit transmission a parity bit is added to made a ninth bit.…..and so on. Error-Detection(4)

30. ODD Parity ODD In ODD parity, when we add the bits together disregarding weight we get or want to get an odd number. 0000 is a four bit message add a parity bit to make it odd 10000 Odd parity is satisfied 00011001is an eight bit message add a parity bit to make it odd 000011001Odd parity is satisfied Parity bit

31. EVEN parity EVEN  In EVEN parity when we add the bits together disregarding weight we get or want to get an even number. 0000 is a four bit message add a parity bit to make it even 00000 Even parity is satisfied 00011001is an eight bit message add a parity bit to make it even 100011001Even parity is satisfied Parity bit

32. How to generate a parity bit  Use exclusive ORs and Exclusive NORs

33. How to make a parity checker

34. Odd or even parity - 0 out of a parity checker means the parity checks and all is ok -1 out of a parity checker means there is an error