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Asynchronous Circuit Design
Introduction Analysis Synthesis Races Static and dynamic hazards Dr. Tri Caohuu © 2006 Andy Davis
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Fundamental Mode Asynchronous Circuit
Output Input Single Input Change Comb Secondary State Excitation State Delay Dr. Tri Caohuu © 2006 Andy Davis
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Asynchronous Sequential Circuit
Analysis
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Example 1- Logic Diagram
Dr. Tri Caohuu © 2006 Andy Davis
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Dr. Tri Caohuu © 2006 Andy Davis
Example 1- Excitation/Transition Table Y1 = x2’y1 +x1’y1+x1’x2y2 Y2 = x1y1+x2y1y2+x1y2+x1x2 z = x2’y1 +x1’y1y2+x1x2‘y2 PS y1 y2 Excitation Y1 Y2 Output z Input State x1x2 Input State x1x2 00 01 10 11 00 01 10 11 00 00 10 00 01 01 00 01 00 01 10 10 10 11 01 11 11 11 01 10 Dr. Tri Caohuu © 2006 Andy Davis
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Dr. Tri Caohuu © 2006 Andy Davis
The State Table Next State Output z PS Input State x1x2 Input State x1x2 00 01 10 11 00 01 10 11 A 00 A 01 B 10 C 11 D 00 C A B 01 A B A B 10 C C D B 11 C D D B Dr. Tri Caohuu © 2006 Andy Davis
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Dr. Tri Caohuu © 2006 Andy Davis
The Flow Table Next State Output z PS Input State x1x2 Input State x1x2 00 01 10 11 00 01 10 11 00 A C A B 01 A B A B 10 C C D B 11 C D D B Dr. Tri Caohuu © 2006 Andy Davis
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Dr. Tri Caohuu © 2006 Andy Davis
The Flow Diagram A B C D Dr. Tri Caohuu © 2006 Andy Davis
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Asynchronous Sequential Network - SYNTHESIS
Races, Cycles, and Hazards
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Synthesis of Asynchronous Sequential Circuit
2 2 x1x2 z1z2 When x1x2=00, then z1z2=00 Sequence x1x2= , then z1z2=10. Output remains at 10 until x1x2=00, then z1z2=00 Sequence x1x2= , then z1z2=01. Output remains at 01 until x1x2=00, then z1z2=00 Dr. Tri Caohuu © 2006 Andy Davis
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A. Partially completed Primitive Flow Table
x1x2 00 01 11 10 1 1 /00 -/- 2 2 /00 3 3 /10 4 4 /01 5 5 /10 6 6 /01 7 7 /00 8 8 /10 9 9 /01 Before output changes from 00 After output changes from 00 Two successful sequences Dr. Tri Caohuu © 2006 Andy Davis
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Dr. Tri Caohuu © 2006 Andy Davis
B. Primitive Flow Table x1x2 00 01 11 10 1 1 /00 2/00 -/dd 7/00 2 1/00 2 /00 5/d0 3 1/d0 3 /10 5/10 4 1/0d 4 /01 6/01 5 3/10 5 /10 8/10 6 4/01 6 /01 9/01 7 6/0d 7 /00 8 8 /10 9 9 /01 Changes from 1 to 0 Changes from 0 to 1 No change on output Dr. Tri Caohuu © 2006 Andy Davis
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Dr. Tri Caohuu © 2006 Andy Davis
C. Reduced Flow Table 9 2 3 4 5 6 7 8 9 56 8 1 2 7 3 6 4 5 a c b d Dr. Tri Caohuu © 2006 Andy Davis
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C. Reduced Flow Table Cont.
00 01 11 10 a a /00 b/d0 c/00 b a/d0 b /10 c c /00 a/00 d/0d d c /0d d /01 Dr. Tri Caohuu © 2006 Andy Davis
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Dr. Tri Caohuu © 2006 Andy Davis
D. Race Free Assignment a = 00 b = 01 c = 10 d = 11 a b a 00 11, 00 ac ab 01 10 10 c b 01 d c 00,11 d=11 Dr. Tri Caohuu © 2006 Andy Davis
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E. Excitation and Output Tables
x1x2 00 01 11 10 d0 y1y2 0d z1z2 Dr. Tri Caohuu © 2006 Andy Davis
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E. Excitation and Output Tables Cont.
Dr. Tri Caohuu © 2006 Andy Davis
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Dr. Tri Caohuu © 2006 Andy Davis
F. Circuit Dr. Tri Caohuu © 2006 Andy Davis
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Dr. Tri Caohuu © 2006 Andy Davis
Race & Critical Race Race Definition: Two or more secondary state (yi) variables change during a transition between stable state. Depending on which variables change firstly, we may end up in an incorrect stable state (critical race). However, if the circuit ends up in a correct state irrespect of which variable changes firstly, we have a case of non-critical race. Dr. Tri Caohuu © 2006 Andy Davis
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Dr. Tri Caohuu © 2006 Andy Davis
Race – Example x1x2 00 01 11 10 1 y1y2 z Dr. Tri Caohuu © 2006 Andy Davis
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Dr. Tri Caohuu © 2006 Andy Davis
Race – Example Cont. x1 x2 y1 y2 < > <0000> δ 1> δ 2 => 1011 => 0011 => 0010 => 0000 δ 2> δ 1 => 1011 => 0011 => 0001 => 0000 δ 1> δ 2 => 1001 => 1101 => 1100 => 1100 We want to go from 01 to 10, but this change first before y1 change from 0 to 1 δ 2> δ 1 => 1001 => 1101 => 1111 => 1110 Non Critical Not Correct Correct Dr. Tri Caohuu © 2006 Andy Davis
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Dr. Tri Caohuu © 2006 Andy Davis
Avoidance 00 01 11 10 a a/0 b/0 a/1 b/1 b c/0 c c/1 d/0 d d/1 Critical Race Col 01 => b, c Col 11 => a, c Col 10 => d, b Dr. Tri Caohuu © 2006 Andy Davis
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Dr. Tri Caohuu © 2006 Andy Davis
Avoidance Cont. 01 10 00 01 10 a b a b 00 11 11 11 00 11 10 d c 10 d c Dr. Tri Caohuu © 2006 Andy Davis
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Dr. Tri Caohuu © 2006 Andy Davis
Avoidance Cont. Let a = 00 ab => b = 01 bc = 01 => c = 11 cd => d = 10 Dr. Tri Caohuu © 2006 Andy Davis
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Dr. Tri Caohuu © 2006 Andy Davis
Avoidance Cont. 00 01 11 10 Connected nodes of transition diagram differed by only one (1) bit Dr. Tri Caohuu © 2006 Andy Davis
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Race-Free State Assignment
00 01 11 10 a a/0 b/0 c/- b c a/- c/1 a 01 b 11 10 c a=00 => b=01, c=10 => b≠c Dr. Tri Caohuu © 2006 Andy Davis
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Method One (adding cycles)
-> d -> c -> (c) 00 01 11 10 a a/0 b/0 d/- b c/- c c/1 d a/- 01 a b 11 10 11 d c y1 y2 a b c d Dr. Tri Caohuu © 2006 Andy Davis
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Dr. Tri Caohuu © 2006 Andy Davis
Method One Cont. x1x2 00 01 11 10 dd y1y2 Dr. Tri Caohuu © 2006 Andy Davis
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Method Two: Universal state assignment
Dr. Tri Caohuu © 2006 Andy Davis
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Dr. Tri Caohuu © 2006 Andy Davis
Method Two Cont. Dr. Tri Caohuu © 2006 Andy Davis
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Dr. Tri Caohuu © 2006 Andy Davis
Method Two Cont. Dr. Tri Caohuu © 2006 Andy Davis
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Dr. Tri Caohuu © 2006 Andy Davis
Method Two Cont. Dr. Tri Caohuu © 2006 Andy Davis
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