1. 1: Background1 System Programming ( 系統程式 ) Main goal: r What is a system software? m Compiler m Assembler m Loader and Linker m Debugger… r To design and implementation of system software. Book content: r Background (SIC & SIC/XE) r Assemblers r Loaders and Linkers r Macro Processors r Compilers r Operating Systems r Other system software r Software Engineering Issues

2. 1: Background2 Chapter I: Background Chapter goal: r To familiar with a pseudo machines: SIC (SIC/XE) m SIC (Simplified Instructional Computer) m SIC/XE (XE stands for “extra equipment”) Overview: r The SIC r SIC machine architecture r SIC programming examples r SIC/XE machine architecture r SIC/XE programming examples Machine dependency

3. 1: Background3 r Why using SIC machine? m Most system software differs from application software is machine dependency. m System software are usually related to the architecture of the machine on which they are to run. r SIC is a hypothetical computer that has been carefully designed to include the hardware features most often found on real machine. The SIC machine

4. 1: Background4 r Memory m 8-bit bytes m Word: 24 bits (three consecutive bytes) r Registers m Each register is 24 bits in length. The SIC machine architecture

5. 1: Background5 r Data formats r Addressing modes. The SIC machine architecture (cont.)

6. 1: Background6 r Instruction set m Load and store registers (LDA, LDX, STA, STX, etc.) m Integer arithmetic operations (ADD, SUB, MUL, DIV) m Compare the value in register A with a word in memory (COMP) m Conditional jump instructions (JLT, JEQ, JGT) m … m For detailed see Appendix A r Input and Output m Test device (TD), Read data (RD), Write data (WD)… The SIC machine architecture (cont.)

7. 1: Background7 r Data movement The SIC programming examples

8. 1: Background8 r Arithmetic operations The SIC programming examples (cont.)

9. 1: Background9 r Looping and indexing operations The SIC programming examples (cont.) MOVECH STR1 STR2 ZERO ELEVEN

10. 1: Background10 r Indexing and looping operations The SIC programming examples (cont.)

11. 1: Background11 r Input and output operations The SIC programming examples (cont.)

12. 1: Background12 r Subroutine call and record input operations The SIC programming examples (cont.)

13. 1: Background13 r Memory m The same as that previously described for SIC. m Maximum memory available on a SIC/XE system is 1MB. r Registers The SIC/XE machine architecture

14. 1: Background14 r Data formats (48-bit floating point) r f*2^(e-1024) r Instruction formats and addressing modes m e=0 means Format 3 ; e=1 means Format 4 m i=0, n=0 means SIC machine (for upward compatible) m i=1, n=0 means immediate addressing m i=0, n=1 means indirect addressing m i=1, n=1 means simple addressing The SIC/XE machine architecture (cont.)

15. 1: Background15

16. 1: Background16

17. 1: Background17 r Instruction set m SIC/XE provides all of the instructions that are available on the standard versions. m It also provides instructions to perform floating-point arithmetic operations (ADDF, SUBF, MULF, DIVF..) m Register-to-register arithmetic operations (ADDR, SUBR,…) r Input and Output m SIO (start I/O channel), TIO (test I/O channel) and HIO (halt I/O channel) The SIC/XE machine architecture (cont.)

18. 1: Background18 r Data movement The SIC/XE programming examples

19. 1: Background19 r Data movement Compared the SIC with SIC/XE

20. 1: Background20 r Arithmetic operations The SIC/XE programming examples (cont.)

21. 1: Background21 r Looping and indexing operations The SIC/XE programming examples (cont.) MOVECH STR1 STR2

22. 1: Background22 r Indexing and looping operations The SIC/XE programming examples (cont.)

23. 1: Background23 r Subroutine call and record input operations The SIC/XE programming examples (cont.)

24. 1: Background24 r CISC: Complex Instruction Set Computers machine. m relatively large and complicated instruction set. m several different instruction formats and length m many different addressing modes. r E.g., VAX, Pentium… r The implementation of such an architecture in hardware tends to be complex. CISC vs. RISC

25. 1: Background25 r Introduced by Digital Equipment Corporation (DEC) in 1978. r Memory m All addresses used are byte addresses. m 2 bytes forms a word, 4 bytes forms a longword m 8 bytes forms a quadword, 16 bytes forms a octaword r Registers m 16 general-purpose register. (R15: program counter, R14: stack pointer, R13: frame pointer, R12: argument pointer…) r … The VAX architecture (CISC)

26. 1: Background26 r RISC: Reduced Instruction Set Computers machine m Standard, fixed instruction length m Single-cycle execution of most instructions m Relatively large number of general-purpose registers m Relatively small number of machine instructions m Relatively small number of instruction formats and addressing modes. r E.g., UltraSPARC, PowerPC, Cray T3E… r The implementation of such an architecture in hardware tends to be simple. CISC vs. RISC

27. 1: Background27 r Introduced by Sun Microsystem in 1995. r Memory m All addresses used are byte addresses. m 2 bytes forms a halfword, 4 bytes forms a word r Registers m A large register file (more than 100 general-purpose register) m Fixed instruction length r … The UltraSPARC architecture (RISC)