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Silicon Carbide Department of Electronics http://www.ttu.ee/elektron Prof. Dr. Toomas Rang trang@edu.ttu.eeAddress Ehitajate tee 5 19086 Tallinn ESTONIA Phone:+372 6 202 150 Fax:+372 6 202 151
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Silicon Carbide – trend to top?
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Silicon Carbide The crystal growth quality road map In 2005 3” wafers available with 0.2 micropipes/cm 2 less than 50 dislocations/cm 2
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Silicon Carbide Electronic Energy processing has many parallels with information processing Both technologies have electromagnetics as a fundamental limit Both technologies are eventually thermo- mechanically limited (i.e. in terms of interface reliability and loss density) Both technologies are materials limited New applications for both are driven by a relentless downward cost spiral
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Silicon Carbide
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6.5x10 3 cm 2 in hour World Wide is minimum profitable production volume for semiconductor wafers Reality today is Si6.5x10 6 cm 2 in hour SiC6.5x10 2 cm 2 in hour (military) SiC6.5x10 1 cm 2 in hour (others)
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Silicon Carbide Must we nevertheless continue with Silicon?
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Silicon Carbide PropertySiGaAs3C-SiC6H-SiC4H-SiCDiamond Melting point [C] 142012382830283028304000 Thermal conductivity [W/cmK] 1.50.4654.94.920 Bandgap [eV] 1.11.432.393.023.265.45 Electron mobility [cm 2 /Vs] 15008500100037010002200 Hole mobility [cm 2 /Vs] 6004005090501600 Saturation electron drift velocity [x10 7 cm/s] 112.2222.7 Breakdown field [x10 5 V/cm] 36-2030100 Dielectric constant 11.812.59.79.79.75.5
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Silicon Carbide
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Figures of merit KFM – Key’s Figure of Merit (IC Applications) KFJ – Johnson’s Figure of Merit (High Power Applications) KFMKFJ Si11 SiC6.5281
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Silicon Carbide The major demands for metal layers are Low resistivity for Ohmic, or low leakage currents for Schottky contacts Easy to form Easy to etch for pattern generation (e.g. microelectronics approach) Stable in oxidizing ambient; (e.g. microelectronics approach) Mechanical stability - good adherence, low stress; Surface smoothness Stability throughout processing Generally no reaction with other metals Should not contaminate devices, wafers, or working apparatus; Long lifetimes Low electromigration
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Silicon Carbide Bonding process has the following important advantageous one-step high temperature process for manufacturing multi-layer contacts (low energy process); extra high adhesion between layers to be joined; minimum number of inhomogeneities on large area (near defect free contacts); improves significantly the certain electrical characteristics of manufactured semiconductor devices compared to other technologies
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Silicon Carbide Cline’s initial proposal of two-stage mechanism describes the Diffusion Welding (DW) The applied load causes plastic deformation of the surface asperities thereby reducing interfacial voids. Bond development continues by diffusion controlled mechanism including grain boundary diffusion and power law creep Generally the surface should be prepared better than 0.4 m
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Silicon Carbide Materials to be bonded Direct Bonding Interlayer needed Not examined
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Silicon Carbide Interlayers Generally these layers are needed to join the incompatible materials, for example aluminum and steel. Another use of compliant interlayer is to accommodate mismatch strains generated when bonding materials have widely different thermal expansion coefficient. This is important in joining ceramics to metals where a five to ten fold difference in thermal expansion coefficients is not usual. A reason to reduce bonding temperature and time.
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Silicon Carbide
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Adhesion test Temp [ 0 C] Pressure [MPa] Bond quality 50020-50None 55020-50Bad 60020Bad 60030 Very Good 60050Excellent
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Silicon Carbide Cristal Defects (comet tails, micropipes)
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Silicon Carbide Screw and Edge Defects at the SiC Si-face surface
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Silicon Carbide 4H-SiC wafer upper surface
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Silicon Carbide Structure and examples
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Silicon Carbide U-I characteristics
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Silicon Carbide Forward voltage drop: (a) n 0 -n - – 4H-SiC (N d ~ 1x1015 cm –3 ) (b) p 0 -6H-SiC (N a ~ 5x1015 cm –3 )
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Silicon Carbide SEM Picture (made in Furtwangen)
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Silicon Carbide Inhomogeneities at the SIC surface Bn2 Bn1 Bn3 Bn4
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Silicon Carbide Schematic barrier height picture
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Silicon Carbide Current distribution at Pt-Au-Pt 6H-SiC interface
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Silicon Carbide Temperature distribution in Pt-Au-Pt 6H-SiC interface
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Silicon Carbide Schottky interface: J = q(n m - n 0 ) v R n 0 = N C exp[-(q Bn /k T)] n m = N C exp[-{q (x m ) + q Bn }/k T]
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Silicon Carbide What will come next?
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