1. How Computers Work Lecture 6 Page 1 How Computers Work Lecture 6 Finite State Machines

2. How Computers Work Lecture 6 Page 2 One FSM: The Beta

3. How Computers Work Lecture 6 Page 3 A generic form of exemplified by the Beta: The (Synchronous) Finite State Machine (FSM) Logic (describable by truth table) NEXT STATE INOUT CURRENT STATE Memory CLOCK

4. How Computers Work Lecture 6 Page 4 Another FSM: A (Primitive) Coke Machine COKE 1. Coke Costs $0.15 2. Only Nickels + Dimes Accepted 3. FSM Inputs: 5 : Nickel 10 : Dime Coke : Give-me-a-coke Return : Give-me-my-money-back 4. FSM Outputs: Drop-a-coke ( Drop ) Return $.05 ( Ret5 ) Return $.10 ( Ret10 ) Return $.15 ( Ret15 )

5. How Computers Work Lecture 6 Page 5 State Diagram for a primitive Coke Machine

6. How Computers Work Lecture 6 Page 6 Rules for Designing FSM State Diagrams Arcs out of a state must be mutually exclusive Arcs out of a state must be exhaustive (use * to make this job easier) The starting state should be defined All possible states should be defined, with transitions to starting state S states requires 2 ^ S state variables

7. How Computers Work Lecture 6 Page 7 The Synchronous FSM Comb. Logic NEXT STATE INOUT CURRENT STATE Synch. Delay CLOCK

8. How Computers Work Lecture 6 Page 8 Mealy vs. Moore inout QD clk next state current state inout QD clk next state current state MEALYMOORE i11 s1,o1s2,o2 i12 i21 i22i11,o11 s1s2 i12,o12 i21,o21 i22,o22

9. How Computers Work Lecture 6 Page 9 Mealy vs. Moore from a Truth Table CURRENT NEXT STATE IN STATE OUT 0 0 0 0 0 0 1 1 0 0 0 0 1 0 0 0 1 0 0 0 1 0 1 0 0 0 1 0 0 1 1 0 1 0 0 1 0 1 0 0 0 0 1 1 1 0 1 0 1 0 1 0 1 1...... This is a Mealy machine

10. How Computers Work Lecture 6 Page 10 Another Way of Drawing Moore FSMs inout QD clk next state current state in out QD clk Next State C.L. Output C.L. current state

11. How Computers Work Lecture 6 Page 11 Why do we need the synchronizing element? Logic IN OUT STATE

12. How Computers Work Lecture 6 Page 12 A Human Experiment Make a power-of-2 sequence generator from 2 adders:

13. How Computers Work Lecture 6 Page 13 Experiment 1 –Wait your turn –Immediately Look at the two numbers on the board –Immediately Erase the number in front of you –Immediately Add them in your head –Immediately Write the result in front of you –Walk away Experiment 2 –Follow the instructions of your sergeant / lecturer

14. How Computers Work Lecture 6 Page 14 Possible Synchronizing Elements n The Register, a.k.a. the Edge Triggered Flip- Flop inout C.L. QD clk next state current state clk D (next state) Q (current state)

15. How Computers Work Lecture 6 Page 15 Edge-Triggered F-F Input Timing D CLK Ts = Setup Time Th = Hold Time

16. How Computers Work Lecture 6 Page 16 Possible Synchronizing Elements The Transparent Latch inout C.L. QD G clk next state current state G D (next state) Q (current state)

17. How Computers Work Lecture 6 Page 17 D G Q 0 1 MUX Implementation of the Transparent Latch G D Q

18. How Computers Work Lecture 6 Page 18 Input Specifications for the Transparent Latch D G Ts = Setup Time Th = Hold Time

19. How Computers Work Lecture 6 Page 19 The Globally Synchronous Discipline NO LOGIC CYCLES - All Cycles Are Broken by at least 1 Synchronizing Delay All Synchronizer Inputs obey timing requirements ( Tsetup, Thold )

20. How Computers Work Lecture 6 Page 20 Timing Constraints Transparent Latch inout Logic QD G clk next state current state 1 3 5 4 6 2 G next state current state Tpd min G-Q < t 13 Tpd max G-Q > t 14 Tpd min Logic < t 35 Tpd max Logic > t 46 t 12 < Tpd min G-Q + Tpd min Logic - Thold

21. How Computers Work Lecture 6 Page 21 Timing Constraints n Edge Triggered Flip-Flop inout C.L. QD clk next state current state 1 3 5 4 6 clk next state current state T hold < Tpd min C-Q + Tpd min C.L. Tpd min G-Q < t 13 Tpd max G-Q > t 14 Tpd min Logic < t 35 Tpd max Logic > t 46

22. How Computers Work Lecture 6 Page 22 Maximum Frequency inout C.L. next state current state clk next state current state Clock Period > ___________ QD clk T pd max c-q + T pd max cl + T setup

23. How Computers Work Lecture 6 Page 23 Skew QD clk1 QD clk2 C.L. Tskew < _______________________________ T cd c-q + T cd cl - T hold

24. How Computers Work Lecture 6 Page 24 A Few Details What Happens if the Logic has Glitchy Outputs? inout QD clk next state current state

25. How Computers Work Lecture 6 Page 25 De-Glitching FSM Outputs Assumption: Registers Glitch Free if output doesn’t change from cycle to cycle. Consequence: Output Delayed in next state current state QD clk QD out

26. How Computers Work Lecture 6 Page 26 Summary Today’s Lecture –Every modern computer is a finite state machine –There is a straightforward art to designing FSMs –Timing is important, but there is a discipline for insuring correct operation. Recitation –Practical Practice designing and implementing FSMs