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TIME BASED ENCRYPTION ON NETWORK PROCESSOR TEAM WOLFDALE The University of Southern California 1
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Instructor: Dr. Young Cho Mentor : Siddharth Bhargav Team Members Praveen Francis Gaurav Yadav Samitsubhro Banerji Kaushik Raju Team Wolfdale Members 2
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A Time Based Content Encryption Algorithm Based On a Specific Sender-Receiver IP Pairs. The Project 3
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Encryption at software level is slow as compared to hardware level Most encryption algorithms use static keys. HERE we Use a DYNAMIC KEY The problems 4
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SENDER/RECEIVER IP NO MATCH The General Concept Data 10.0.1.3 / 12.0.1.3 10.0.1.3 / 12.0.2.3 10.0.1.3 10.0.2.3 12.0.2.3 12.0.1.3 5
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SENDER/RECEIVER IP MATCH Encrypting… Encrypting… The General Concept Encrypted Data Data SENDER/RECEIVER IP MATCH Decrypting… Decrypting… Data 10.0.1.3 / 12.0.1.3 10.0.1.3 / 12.0.2.3 10.0.1.3 10.0.2.3 12.0.2.3 12.0.1.3 6
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System Flow Chart IP Matcher Payload Processor 1 Timestamp Source Destination Processor 2 Yes Encrypt/ Decrypt Unmodified Packet Modified Packet No Packet 7
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Multi-threading with branch 8 LUT4 Rs_data(0) Rs_data(1) BNS BS BNS = Branch if not set BS = Branch if set MUX Reg File 32*8B Reg File 32*8B ID Stage IF Stage PC Mod4 Counter Instruction Memory 4K Instruction Memory 4K Control Unit 1 0 100 200 300 0 1 ADD Rs_data(31:0) Rt_data(31:0) BNS BS Rt_data(11:0) 1 Branch 50 Taken 101
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IP Matcher Memory Bank 0 Memory Bank 1 64-bit 4 Unit Comparator Block Payload Timestamp Source Destination Packet Processor and Timestamp Register Match Data Out a Data Out b Data Out a Data Out b Data In 64 bit IP No Match If Found Else 9
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ENCRYPTER/DECRYPTER 10 Timestamp Reg Table of Keys ENCRYPTENCRYPT DECRYPTDECRYPT EN1 EN2 DATA_IN Timestamp from Header DATA_OUT
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IN FIFO Arbiter IP Matcher Encrypt / Decrypt OUTPUT QUEUES IP Matcher Encrypt / Decrypt PF PF1 PF PF2 PF3 PF4 PF5 PF6 PF7 PF8 PF PF1 PF2 PF3 PF4 PF5 PF6 PF7 PF8 MATCH!! PF5 PF4 MAC IDs PF4 PF5 NO MATCH!! DONE!! Multi-core Implementation Calculating checksum.. Calculating checksum.. 11 MAC IDs Comparing MAC ID.. Comparing MAC ID.. Encrypt data!
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Future Scope Of Work Use of sophisticated encryption/decryption techniques. Implementation of bloom filter for ip matcher Two dummy threads to be used for additional network functionalities. 12
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Evaluation of Project Evaluation Methods Secure transmission of data in between nodes Throughput measurement Project Results evaluation logic functionality Check Bug Analysis Rectify Design Compare With The Software Emulation Results 13
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PROGRESS REPORT Phase Description Date Single Core Processor with Multi Threading 04/23/2013 Hardware Accelerators Design Simulation Multi Core Processor with Multithreading Hardware Accelerators Individual Implementation Integration of Hardware Accelerators with Multicore Processors Evaluation of the System Status 04/23/2013 05/07/2013 04/30/2013 05/02/2013 05/10/2013 Completed Pending In Progress Pending 14
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