0. Princess Sumaya University د. بســام كحـالــه Dr. Bassam Kahhaleh
Digital Logic Design
22345
Assembly Language
د. بســام كحـالــه
Dr. Bassam Kahhaleh
Dr. Bassam Kahhaleh

1. Princess Sumaya University
Digital Logic Design
22345 – Assembly Language
Chapter 2:
Intel Architecture IA - 32
Dr. Bassam Kahhaleh

2. Intel Processors History
Year
Microprocessor
Address Bits
Data Bits
Transistors
1971
4004 12 4
2,300
1974
8080 16 8
6,000
1978
8086 20
16/8
29,000
1982
80286 24
134,000
1985
80386 32
32/16/8
275,000
1989
80486
1,200,000
1992
Pentium
3,100,000
1995
Pentium Pro
5,500,000
1997
Pentium II
7,500,000
1999
Pentium III
9,500,000
2001
Pentium 4
42,000,000
2004
Pentium 4 EM64T 64
125,000,000
2008
Core 2 Quad
820,000,000

3. Microprocessor Architecture
Register File
ALU
Microprocessor
M E M O R Y
Address
Data

4. System Management Mode
Modes of Operation
Real-Address Mode
20-Bit Address (1 MB Memory)
8/16-Bit Data
8/16-Bit Registers
Protected Mode
Virtual Mode
System Management Mode

5. Real Mode Registers Accumulator Register Base Register Count Register
 8 Bits 
 8 Bits 
Accumulator Register AH AL AX
Base Register BH BL BX
Count Register CH CL CX
Division Register DH DL DX

6. Real Mode Registers Source Index Destination Index Base Pointer
 Bits 
Source Index SI
Destination Index DI
Base Pointer BP
Stack Pointer SP
Instruction Pointer IP

7. Real Mode Registers Code Segment Data Segment Extra Segment
 Bits 
Code Segment CS
Data Segment DS
Extra Segment ES
Stack Segment SS

8. Real Mode Addressing 64 KB Segmentation 16-Byte Boundary Alignment
Seg:Offset Notation
Example:
20 Bits
Segment Register
0000 +
Offset
Memory Address

9. Flags Status Flags Control Flags Carry (CF) Overflow (OF) Sign (SF)
Zero (ZF)
Auxiliary Carry (AC)
Parity (PF)
Control Flags
Direction, Interrupt, etc.
OF DF IF TF SF ZF AC PF CF

10. Intel 8086/8088 IP AL AH BL BH CL CH DL DH SI DI BP SP CS DS ES SS
ALU Operations:
ADD
SUB
MUL
DIV
INC
DEC
AND OR 

11. x86 Assembly Language Instruction Format Machine Code
Mnemonic
One or More Operands
Machine Code
Assembly Statement
Label
Instruction
Comment
Mnemonic Operands
Opcode Mode Operands

12. Chapter 2