1. 7-Segment LED Display DD: Section 5.1-5.2 Mano: Section 3.10

2. Topics Using always @() Using Case Staetment Wire Versus reg Mux Use Mux to display one bit at a time

3. always statement The sensitivity list contains a list of all signals that will affect the outputs generated by the always block.

4. always @(*) * in the sensitivity list will automatically include all signals on the right side of your statements always @(*) can be used when you want your elements to change their values as one or more of its inputs change. always@ can be used with either non-blocking statement (if you want to execute statements in parallel) or blocking statement (if you want to execute statements sequentially)

5. Why using always @(*) (Desirable) (incorrect!)

6. case (=, implies that blocking statements are used) the number preceding : indicates the value of the case parameter. ‘hA means “A” in hex numbers. 7’b0000001 means 7 binary numbers with a sequence equal to 0000001

7. default The default statement is necessary since Verilog actually defines four possible Values for each bit: 0 1 Z (high impedance) X (unknown value)

8. reg All outputs generated by the always block must be declared to be of type reg. Reg is used to suggest that the values behaves like a variable that might be stored in a register.

9. wire

10. Legal Uses of the wire

11. reg

12. Legal Uses of reg

13. When wire and reg are Interchangable

14. Test Bench for hex7seg_case.v

15. Multiplexer 2-to-1 mux 4-to-1 mux

16. 2-to-1 mux A 2-input mux is controlled by a single control line s. If s=0, y=a and y=b if s=1.

17. Implementation

18. 4-to-1 Mux

20. (Creating a 4 x 1 MUX from 2 x 1 MUX)

21. Multiplexing 7-Segment Displays Get values for an[3:0] from btn[3:0] so that only one LED is displayed. If s[1:0]=00, then x[3:0]. If s[1:0]=01, then x[7:4]. If s[1:0]=10, then x[11:8]. If s[1:0]=11, then x[15:12]. Use Quad 4-to-1 mux