1. The Central Processing Unit Instruction Sets: Characteristics and Functions

2. What is an instruction set? zThe complete collection of instructions that are understood by a CPU zMachine Code zBinary zUsually represented by assembly codes

3. Elements of an Instruction zOperation code (Op code) yDo this zSource Operand reference yTo this zResult Operand reference yPut the answer here zNext Instruction Reference yWhen you have done that, do this...

4. Source and result operands can be in one of three areas: zMain memory (or virtual memory or cache) zCPU register zI/O device

5. Instruction Representation zIn machine code each instruction has a unique bit pattern zFor human consumption (well, programmers anyway) a symbolic representation (called mneumonics) is used ye.g. ADD, SUB, LOAD zOperands can also be represented in this way yADD A,B  0000 0001 1000 0000 1000 1010

6. Instruction Types zData processing (arithmetic and logic instructions) zData storage (memory instructions) zData movement (I/O instructions) zProgram flow control (test and branch instructions)

7. Number of Addresses (a) z3 addresses yOperand 1, Operand 2, Result ya = b + c; yMay be a forth - next instruction (usually implicit) yNot common yNeeds very long words to hold everything yE.g. ADD A, B, C; store result of A+B in C

8. Number of Addresses (b) z2 addresses yOne address doubles as operand and result ya = a + b yReduces length of instruction yRequires some extra work xTemporary storage to hold some results yE.g. ADD A, B; store result of A+B in A

9. Number of Addresses (c) z1 address yImplicit second address yUsually a dedicated register (called accumulator) yCommon on early machines (when memory was scarce) yE.g. ADD B; add result of Acc. + B in Acc.

10. Number of Addresses (d) z0 (zero) addresses yAll addresses implicit yUses a stack ye.g. push a y push b y add y pop c yc = a + b … 1234 5678 b a c

11. Number of Addresses (e) zE.g., Y=(A-B)/(C+DxE)

12. Number of Addresses (f) InstructionComment  SUB Y, A, BY  A-B  MPY T, D, E T  DxE  ADD T, T, C T  T+C  DIV Y, Y, T Y  Y/T (a)Three-address instructions InstructionComment  MOVE Y, A Y  A  SUB Y, B Y  Y-B zMOVE T, D T  D zMPY T, E T  TxE zADD T, C T  T+C  DIV Y, T Y  Y/T (b) Two-address instructions

13. Number of Addresses (g) InstructionComment  LOAD DAC  D zMPY EAC  ACxE zADD CAC  AC+C zSTOR YY  AC zLOAD A AC  A zSUB B AC  AC-B zDIV Y AC  AC/Y zSTOR Y Y  AC (c) One-address instructions

14. How Many Addresses zMore addresses yMore complex (powerful?) instructions yMore registers xInter-register operations are quicker yFewer instructions per program zFewer addresses yLess complex (powerful?) instructions yMore instructions per program (more complex programs and longer total execution time) yFaster fetch/execution of individual instructions

15. Design Decisions (1) zOperation repertoire (how fast can we decode?) yHow many ops? yWhat can they do? yHow complex are they? zData types zInstruction formats (how fast can we fetch?) yLength (in bits) of op code field yNumber of addresses yVariable length instruction possible (more complex in fetching) yMemory occupation is not really a problem anymore

16. Design Decisions (2) zRegisters yNumber of CPU registers available yWhich operations can be performed on which registers? zAddressing modes yThe mode or modes by which the address of an operand is specified. zRISC v CISC

17. Types of Operand Machine instructions operate on data. The most important general categories of data are: zAddresses zNumbers yInteger or fixed point/floating point/decimal zCharacters yASCII etc. zLogical Data yBits or flags

18. Types of Operation zData Transfer zArithmetic zLogical zConversion zI/O zSystem Control zTransfer of Control

19. Data Transfer zSpecify ySource yDestination yAmount of data zMay be different instructions for different movements ye.g. IBM 370 zOr one instruction and different addresses ye.g. VAX

20. Arithmetic zAdd, Subtract, Multiply, Divide zSigned Integer zFloating point ? zMay include yIncrement (a++) yDecrement (a--) yNegate (-a)

21. Logical zBitwise operations zAND, OR, NOT

22. Conversion zE.g. Binary to Decimal

23. Input/Output zMay be specific instructions zMay be done using data movement instructions (memory mapped) zMay be done by a separate controller (DMA)

24. Systems Control zPrivileged instructions zCPU needs to be in specific state yRing 0 on 80386+ yKernel mode zFor operating systems use

25. Transfer of Control zBranch ye.g. branch to x if result is zero zSkip ye.g. increment and skip if zero yISZ Register1 yBranch xxxx yADD A zSubroutine call yc.f. interrupt call

26. 8086 Instructions zMOV zADD zMUL z…

27. Pentium (x86) Data Types z8 bit Byte z16 bit word z32 bit double word z64 bit quad word zAddressing is by 8 bit unit zA 32 bit double word is read at addresses divisible by 4