1. 1/42 Changkun Park Title Dual mode RF CMOS Power Amplifier with transformer for polar transmitters March. 26, 2007 Changkun Park Wave Embedded Integrated Systems (WEIS) Lab. School of Electrical Engineering and Computer Science Korea Advanced Institute of Science and Technology (KAIST)

2. 2/42 Changkun Park Contents Introduction / Motivation 1. Efficiency of polar transmitter 2. Voltage combining technique Variable Load Technique Proposed Stage-Convertible Power Amplifier 1. Power amplifier with three-port transformer 2. Power amplifier with dual-primary transformer Proposed Tournament-Shaped Power Combiner 1. Theory of tournament-shaped power combiner 2. Circuit design Conclusions

3. 3/42 Changkun Park Polar transmitter Amplitude signal  Supply voltage Phase signal  RF input Amplitude signal  Supply voltage Phase signal  RF input Switching mode PA Suitable for GSM and EDGE Not required mixers and filters Switching mode PA Suitable for GSM and EDGE Not required mixers and filters Two Input signalsFeatures Simplified architecture

4. 4/42 Changkun Park PA for polar transmitters In the high power  high efficiency In the low power  low efficiency In the high power  high efficiency In the low power  low efficiency P OUT =1.365 X V DD 2 / R LOAD  Implementable with current CMOS Non-linear power amplifier ( Class E ) Low power efficiency GSM ~ 20 dB / EDGE ~ 37 dB In the low power  low efficiency GSM ~ 20 dB / EDGE ~ 37 dB In the low power  low efficiency Dynamic range In the low power  low efficiency Range of V DD  Dynamic range

5. 5/42 Changkun Park Strategy for CMOS PA Low breakdown voltage Characteristics of CMOS Problems Low output power Solutions Lossy substrate Low efficiency No via processGain reduction High efficiency CMOS PA for polar transmitters Goal Conventional polar Tx Low efficiency in the low output power Cascode structure Voltage combining method Differential structure Multi-mode structure

6. 6/42 Changkun Park Voltage combining technique Current combining technique Voltage combining technique Hard to implement output matching on a chip Sensitive matching network Impedance transformation Low losses Ref : I. Aoki et al, “Distributed active transformer,” T-MTT, Jan. 2002.

7. 7/42 Changkun Park Contents Introduction / Motivation 1. Efficiency of polar transmitter 2. Voltage combining technique Variable Load Technique Proposed Stage-Convertible Power Amplifier 1. Power amplifier with three-port transformer 2. Power amplifier with Dual-primary transformer Proposed Tournament-Shaped Power Combiner 1. Theory of tournament-shaped power combiner 2. Circuit design Conclusion

8. 8/42 Changkun Park Efficiency problems of polar Tx. Low efficiency in the low output power region

9. 9/42 Changkun Park Solution for efficiency problems Fixed high P IN & Low P OUT  Low PAE regardless High DE High Power Mode : Low R LOAD Low Power Mode (High PAE) : High R LOAD Proposed Solutions for high efficiency

10. 10/42 Changkun Park Dynamic range problems V DD : 0.7 V ~ 3.3 V  Dynamic Range ~ 13.5 dB Dynamic range for GSM > 20 dB Dynamic range ~ f(V DD, R LOAD ) Proposed Solutions for dynamic range Dynamic range

11. 11/42 Changkun Park Proposed stage-convertible stru. Load impedance of driver stage  high R LOAD  high Eff. In the low P OUT Load impedance of power stage  low R LOAD  high maximum P OUT Proposed architecture High power mode  all stages are turned on  P OUT ~ P OUT of power stage Low power mode  power stage is turned off  P OUT ~ P OUT of driver stage Operation

12. 12/42 Changkun Park Proposed stage-convertible PA Implementation High power modeLow power mode Power stage Working as Power stage Not working Driver stage Working as driver stage Working as power stage Stage-convertible structure

13. 13/42 Changkun Park Proposed stage-convertible PA Schematic

14. 14/42 Changkun Park Proposed stage-convertible PA Implementation TSMC 0.25  m RFCMOS process 50 Ω I/O matching Chip size : 1.2 mm X 1.8 mm Design strategy  Differential structure  Cascode structure  Transmission line transformer

15. 15/42 Changkun Park Proposed stage-convertible PA V DD : 0.7 V ~ 3.3 V Frequency : 1. 88 GHz (GSM) Maximum P OUT : 28 dBm Maximum DE : 34 % Low power efficiency improvement : 130 % at 16 dBm P OUT Dynamic range : 37 dB Measurement results

16. 16/42 Changkun Park Proposed stage-convertible PA Contributions Problems of PA for polar transmitters are analyzed. Stage-convertible structure is proposed.  Variable load technique is used.  Low efficiency at low output power region is improved. Ref : Changkun Park et al, “Power Amplifier,” patent registered num. Korea, 2007. Changkun Park et al, “Power amplifier using 3-port transmission line transformer,” patent pending. Korea / USA / Japan / China, 2006. Changkun Park et al, “A 1.9-GHz Triple-Mode Class-E Power Amplifier for a Polar Transmitter,” MWCL, Feb. 2007.

17. 17/42 Changkun Park Contents Introduction / Motivation 1. Efficiency of polar transmitter 2. Voltage combining technique Variable Load Technique Proposed Stage-Convertible Power Amplifier 1. Power amplifier with three-port transformer 2. Power amplifier with Dual-primary transformer Proposed Tournament-Shaped Power Combiner 1. Theory of tournament-shaped power combiner 2. Circuit design Conclusion

18. 18/42 Changkun Park Proposed SC PA using TLT Impedance transformation using transmission line transformer

19. 19/42 Changkun Park Proposed SC PA using TLT Assume R T = 25 Ω k-factor = 0.5 L 1 increase  High R LOAD L 1 decrease  Low R LOAD L 1 can be changed by  Length  Width  Structure Impedance transformation

20. 20/42 Changkun Park Proposed SC PA using TLT Multi-primary structure Dual load impedance  Suitable for variable load PA Proposed 3-port transformer

21. 21/42 Changkun Park Proposed SC PA using TLT All of the stages are turned on Driver stage drives the power stage Low R LOAD  High maximum P OUT High power mode Power stage is turned off P OUT of Driver stage = P OUT of PA High R LOAD  Efficiency & Dynamic range increase Low power mode

22. 22/42 Changkun Park Proposed SC PA using TLT Simplified schematic

23. 23/42 Changkun Park Proposed SC PA using TLT TSMC 0.18  m RFCMOS process 50 Ω I/O matching Chip size : 1.3 mm X 1.6 mm Design strategy  3-port transformer  Differential structure  Cascode structure  Transmission line transformer Implementation

24. 24/42 Changkun Park Proposed SC PA using TLT High power modeLow power modeAuto-switching mode Frequency : 1. 9 GHz Pin = 6.19 dBm Supply voltage : 0.5 ~ 3.3 V

25. 25/42 Changkun Park Proposed SC PA using TLT Measured PAE vs. P OUT Measured P OUT vs. V DD Frequency : 1.9 GHz V DD : 0.5 V ~ 3.3 V Dynamic Range > ~ 20 dB Efficiency Improvement at 16 dBm ~ 370 %

26. 26/42 Changkun Park Proposed stage-convertible PA Contributions Transmission line transformer is analyzed.  Impedance transformations using parasitic components of transmission line transformer Stage-convertible structure using TLT is proposed.  3-port asymmetric transformer is proposed.  Output power is increased. Ref : Changkun Park et al, “Transmission line transformer,” patent registered. Korea, 2007. Changkun Park et al, “Transmission line transformer,” patent pending. USA / Japan, 2006. Changkun Park et al, “A 1.9-GHz CMOS Power Amplifier Using Three-Port Asymmetric Transmission Line Transformer for a Polar Transmitter,” T-MTT, Feb. 2007. published.

27. 27/42 Changkun Park Improved SC PA using TLT For low power mode, high inductance is needed.  parasitic resistance is increased.  low power efficiency improvement may be degraded. Low power efficiency improvement

28. 28/42 Changkun Park Improved SC PA using TLT Impedance transformation ratio 1:8 Very small size (transformer) 1000  m X 1000  m (previous work)  670  m X 510  m High power mode

29. 29/42 Changkun Park Improved SC PA using TLT Low power mode

30. 30/42 Changkun Park Improved SC PA using TLT TSMC 0.18  m RFCMOS process 50 Ω I/O matching Chip size : 1.15 mm X 1.3 mm Design strategy  Differential structure  Cascode structure  Transmission line transformer Implementation

31. 31/42 Changkun Park Improved SC PA using TLT Frequency : 1.8 GHz V DD : 0.5 V ~ 3.3 V Dynamic Range ~ 20 dB Efficiency at 16 dBm ~ 33 % P IN = 10 dBm V DD = 3.3 V (Maximum P OUT condition) Gain at 1.8 GHz = 21.6 dB Measured freq. responsesReliability at maximum P OUT

32. 32/42 Changkun Park Comparison with previous work Maximum P OUT is almost same with previous work Eff. at Maximum P OUT is almost same with previous work Low power efficiency is improved Measured freq. responses

33. 33/42 Changkun Park Improved stage-convertible PA Contributions Transmission line transformer is analyzed.  Conditions to improve efficiency is found Dual-primary transformer is proposed.  Low power efficiency is improved. Ref : Changkun Park et al, “Multi-Primary Transformer,” patent registered. Korea, 2007. Changkun Park et al, “A 1.8-GHz CMOS Power Amplifier Using a Dual-Primary Transformer with Improved Efficiency in the Low Power Region,” T-MTT, submitted.

34. 34/42 Changkun Park Contents Introduction / Motivation 1. Efficiency of polar transmitter 2. Voltage combining technique Variable Load Technique Proposed Stage-Convertible Power Amplifier 1. Power amplifier with three-port transformer 2. Power amplifier with Dual-primary transformer Proposed Tournament-Shaped Power Combiner 1. Theory of tournament-shaped power combiner 2. Circuit design Conclusion

35. 35/42 Changkun Park Proposed Tournament combiner Distributed active transformer Another solutions

36. 36/42 Changkun Park Proposed Tournament combiner

37. 37/42 Changkun Park Proposed Tournament combiner

38. 38/42 Changkun Park Proposed Tournament combiner TSMC 0.18  m RFCMOS process Fully integrated PA with 50 Ω I/O matching Chip size : 1.2 mm X 2.0 mm Design strategy  Tournament-shaped power combiner  Differential structure  Cascode structure Implementation

39. 39/42 Changkun Park Proposed Tournament combiner Frequency : 1.81 GHz V DD : 0.5 V ~ 3.3 V Maximum P OUT = 31.7 dBm Eff. = 38 % at max. P OUT Broad band characteristics Measured PAE vs. P OUT Frequency response

40. 40/42 Changkun Park Proposed Tournament combiner Contributions Tournament-shaped power combiner is proposed.  Isolation problems between TLT and input feed-line are solved. Ref : Changkun Park et al, “Power amplifier used power combiner,” patent pending. Korea, 2007. Changkun Park et al, “Tournament-Shaped Magnetically Coupled Power Combiner Architecture for RF CMOS Power Amplifier,” T-MTT, submitted.

41. 41/42 Changkun Park Conclusions  PA for polar transmitter –Efficiency characteristics are analyzed.  Transformers for dual-mode power amplifier –Power amplifier with 3-port transformer is proposed. –Power amplifier with dual-primary transformer is proposed.  New power combiner –Tournament-shaped power combiner is proposed.

42. 42/42 Changkun Park Publications International Journals Published –“Fully integrated 1.9-GHz CMOS power amplifier for polar transmitter applications,” Microw. and Optical Technology Lett., vol. 48, no. 10, pp. 2053-2056, Oct. 2006. –“A 1.9-GHz Triple-Mode Class-E Power Amplifier for a Polar Transmitter,” IEEE Microw. and Wireless Components Lett., vol. 17, no. 2, pp. 148-150, Feb. 2007. –“A 1.9-GHz CMOS Power Amplifier Using Three-Port Asymmetric Transmission Line Transformer for a Polar Transmitter,” IEEE Trans. Microw. Theory and Tech., vol. 55, no. 2, part 1, pp. 230-238, Feb. 2007., vol. 17, no. 2, pp. 148-150, Feb. 2007. Submitted –“A 1.8-GHz CMOS Power Amplifier Using a Dual-Primary Transformer with Improved Efficiency in the Low Power Region,” IEEE Trans. Microw. Theory and Tech. –“Tournament-Shaped Magnetically Coupled Power Combiner Architecture for RF CMOS Power Amplifier,” IEEE Trans. Microw. Theory and Tech. International Patents –“Transmission line transformer,” USA / Japan. –“ Power amplifier with automatically switching facility,” USA / Japan / China –“ Power amplifier using 3-port transmission line transformer,” USA / Japan / China –“ Power amplifier,” USA / Japan / France Domestic Patents - 16

43. 43/42 Changkun Park Improved SC PA using TLT Simulation results Equations