1. Department of Electrical and Computer Engineering Microsystems Prototyping Laboratory Carry Skip 4-Bit Blocks in Pass and DCVSL Logic Michael Morgan Department of Electrical and Computer Engineering Microsystems Prototyping Laboratory Mississippi State University

2. Department of Electrical and Computer Engineering Microsystems Prototyping Laboratory Carry Skip Poor Man’s Acceleration Method Pass transistor implementation adds 25 transistors DCVSL implementation adds 40 transistors Try to speed up worst case – propagate 0 + 1 happens with 50% probability The average length of the carry chain in a k-bit addition is log 2 (1.25k) 1

3. Department of Electrical and Computer Engineering Microsystems Prototyping Laboratory Carry Skip Block Diagram

4. Department of Electrical and Computer Engineering Microsystems Prototyping Laboratory Pass Transistors Overview Advantages Low power Good for Mux logic Easily sized Sizes decrease down a path Disadvantages No drive strength Signals degrade due to channel resistance—must buffer PMOS cannot pull down to Gnd NMOS cannot pull up to Vdd Good for Mux logic only In Out Control

5. Department of Electrical and Computer Engineering Microsystems Prototyping Laboratory DCVSL Overview Differential Cascade Voltage Switch Logic 2

6. Department of Electrical and Computer Engineering Microsystems Prototyping Laboratory DCVSL Overview (continued) Advantages 2 PMOS per logic gate Dual rail Disadvantages Dual rail Sizing – incorrect sizing will cause functional failures Power dissipated through crowbar current

7. Department of Electrical and Computer Engineering Microsystems Prototyping Laboratory Pass/DCVSL Raw Data PassDCVSL T phl (ns)48.6919.17 T plh (ns)154.1910.18 Power Dissipated (W) 1.05E-183.08E-17 Switched Cap (F)1.68E-271.23E-26 Transistor Count105144

8. Department of Electrical and Computer Engineering Microsystems Prototyping Laboratory Results DCVSL is faster 200% for T plh 25% for T phl Why? Pass transistors have no drive Pass transistors consume 29% less power Why? No drive Also, DCVSL has crowbar current

9. Department of Electrical and Computer Engineering Microsystems Prototyping Laboratory Conclusions Stick to CMOS! Pass transistors may seem novel, but must buffer I used full buffers DCVSL must be sized correctly, or gates will not even function! Also crowbar current can be power-hungry and slow

10. Department of Electrical and Computer Engineering Microsystems Prototyping Laboratory References [1] Dr. J. C. Harden “Basic Addition,” Slide 14, http://www.ece.msstate.edu/classes/ece8053/pr esentations/08f02-basadd.ppt. [2] Dr. B. Reese “DCVSL”, Slide 1, http://www.ece.msstate.edu/~reese/EE8273/lec tures/dcvsl/dcvsl_files/frame.htm.