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Decoders Discussion D9.5 Example 25
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Decoders
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3-to-8 Decoder decoder38.vhd library IEEE; use IEEE.STD_LOGIC_1164.all; use IEEE.STD_LOGIC_unsigned.all; entity decoder38 is port( a : in STD_LOGIC_VECTOR(2 downto 0); y : out STD_LOGIC_VECTOR(0 to 7) ); end decoder38;
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architecture decoder38 of decoder38 is begin process(a) variable j: integer; begin j := conv_integer(a); for i in 0 to 7 loop if(i = j) then y(i) <= '1'; else y(i) <= '0'; end if; end loop; end process; end decoder38;
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3-to-8 Decoder
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TTL Decoders 1 2 3 4 5 6 7 89 10 11 12 13 14 15 16 GND Vcc1G 1A 1B 1Y0 1Y1 1Y2 1Y3 2G 2A 2B 2Y0 2Y1 2Y2 2Y3 74LS139 Y0 Y1 Y2 Y3BA G 1 X X 1 1 1 1 0 0 0 0 1 1 1 0 0 1 1 0 1 1 0 1 0 1 1 0 1 0 1 1 1 1 1 0 Dual 2-4 Decoder
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TTL Decoders 1 2 3 4 5 6 7 89 10 11 12 13 14 15 16 GND VccA B C G1 Y7 Y0 Y1 Y2 Y3 Y4 Y5 Y6 !G2A !G2B 74LS138 ABC Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 G1 G2 G2 = G2A # G2B X = don't care X 1 X X X 1 1 1 1 1 1 1 1 0 X X X X 1 1 1 1 1 1 1 1 1 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 1 1 0 1 1 1 1 1 1 1 0 0 1 0 1 1 0 1 1 1 1 1 1 0 0 1 1 1 1 1 0 1 1 1 1 1 0 1 0 0 1 1 1 1 0 1 1 1 1 0 1 0 1 1 1 1 1 1 0 1 1 1 0 1 1 0 1 1 1 1 1 1 0 1 1 0 1 1 1 1 1 1 1 1 1 1 0 3-to-8 Decoder
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Decoder Networks
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4-input tree decoder
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8-input Coincident Decoder
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